SMSxxxAF, SMSxxxFF, SMSxxxBFMemory array partitioning
2 Memory array partitioning
The basic unit of data transfer to/from the SD Memory Card is the Byte. The memory array is divided into several structures as described below and summarized in Table17.
Block
The Block is the unit structure related to block-oriented read and write commands. Its size is the number of Bytes that are transferred when a block-oriented read or write command is sent by the host. The SD Memory Card Block size is either programmable or fixed. The information about allowed block sizes and programmability is stored in the CSD Register. The details of the Memory Array Structure and the number of addressable Blocks are shown inTable17.
Sector
The sector is the unit structure related to the erase commands. Its size is the number of blocks that are erased at any one time. The sector size is fixed for each device. The information about the sector size (in blocks) is stored in the CSD register.
Write Protect Group (WP-Group)
The WP-Group is the smallest structure that may be individually protected. Its size is the number of Sectors that are Write Protected with one bit. The information about the Write Protect Group size is stored in the CSD Register.Table 7.
Type of StructureBlocksSectorWP-Groups
Memory array structures
Number of structures in device
Unit512 BytesBlockSector
32 MByte 64 MByte 128 MByte 256 MByte 512 MByte 1 GByte DevicesDevicesDevicesDevicesDevicesDevices597761281
1226241282
2483201284
4997121288
100249612816
199987212832
11/61Memory array partitioningFigure 1.Write Protection hierarchyMemory CardWrite Protect Group 0Sector 1Block 1SMSxxxAF, SMSxxxFF, SMSxxxBF
Block 2Sector 2Sector 3Write Protect Group 1Write Protect Group 2ai1004112/61 SMSxxxAF, SMSxxxFF, SMSxxxBFSecure digital memory card interface
3 Secure digital memory card interface
This section applies to the full-size SD Memory Card only, or to the MiniSD and MicroSD card when used with an adapter.
Details on the 11-pin communication interface of the MiniSD card used without an adapter are still to be announced. Figure3: MicroSD pin assignment shows the MicroSD pinout.The Secure Digital Memory Card has an advanced 9-pin communication interface (Clock, Command, 4 Data pins and 3 Power Supply pins) designed to operate in a low voltage range. The Secure Digital Card has its nine pins exposed on one side (see Figure2). The signal/pin assignments are listed in Table8 The pin types are Power Supply, Input, Output and Push-Pull. The signals include six communication lines CMD, DAT0, DAT1, DAT2, DAT3, CLK and three supply lines VDD, VSS1 and VSS2.
Figure 2.Full size Secure Digital Memory Card form factorWrite Enable (Up)123456789SD MemoryCardWrite Protect (Down)ai10029Table 8.
Pin #
Full-size SD Memory Card pin assignment
SD mode
Name
Type(1)I/O/PP(3)
PPSSISI/O/PPI/O/PPI/O/PP
Description
Card Detect / Data Line [Bit 3]Command/ResponseSupply voltage groundSupply voltageClock
Supply voltage groundData Line [Bit 0]Data Line [Bit 1]Data Line [Bit 2]
NameCSDIVSSVDDSCLKVSS2DO
TypeIISSIS
SPI mode
Description
Chip Select (active Low)Data In
Supply voltage groundSupply voltageClock
Supply voltage ground
123456789
CD/DAT3(2)
CMDVSS1VDDCLKVSS2DAT0DAT1(2)DAT2(2)
O/PPData Out
ReservedReserved
1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.
2.The extended DAT lines (DAT1-DAT3) are input on power-up. They start to operate as DAT lines after SET_BUS_WIDTH
command.3.After power-up this line is input with 50kW pull-up (can be used for card detection or SPI mode selection). The pull-up
should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.
13/61Secure digital memory card interface
Figure 3.MicroSD pin assignmentSMSxxxAF, SMSxxxFF, SMSxxxBF
Pin 1Pin 2Pin 3Pin 4Pin 5Pin 6Pin 7BPin 8Ai11728Table 9.
Pin1 2
MicroSD Contact Pad Assignment
SD Mode
Name Type(1)DAT2 CD/DAT3(2)
SPI Mode
Description
Description Name Type RSV CS
I
I/O/PP Data Line [Bit 2] I/O/PPCard Detect / Data Line
(3)
[Bit 3]
Reserved
Chip Select (neg true)
3 CMD PP Command/Response DI I Data In 4 VDD
S Supply voltage
VDD S Supply voltage SCLK I Clock VSS DO
S
Supply voltage ground
5 CLK I Clock 6 VSS
S
Supply voltage ground
7 DAT0 I/O/PP Data Line [it 0] 8 DAT1 O/PP Data Out
Reserved
RSV 1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.
2.The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMediaCards.3.After power up this line is input with 50KOhm pull-up (can be used for card detection or SPI mode
selection). The pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.
14/61 SMSxxxAF, SMSxxxFF, SMSxxxBFSecure digital memory card interface
3.1 Secure digital memory card bus topology
The Secure Digital Memory Card system defines two alternative communications protocols: SD and SPI that correspond to two operating modes.
Either mode can be selected in the application, mode selection is transparent to the host. The host automatically detects the operating mode of the card by issuing the Reset command (refer to Section7.2.1: Mode Selection) and will expect all further
communications to use the same mode. Therefore, applications that use only one communication mode do not have to be aware of the other.The SD bus includes the following signals:
●●●●
CLK: Host to card clock signal
CMD: Bi-directional Command/Response signalDAT0 - DAT3: 4 Bi-directional data signals.VDD, VSS1, VSS2: Power and ground signals.
The SD Memory Card bus has a synchronous star topology (refer to Figure4: Secure Digital Memory Card system bus topology) with a single master (the application) and multiple slaves (the cards). The Clock, power and ground signals are common to all cards. The command (CMD) and data (DAT0 - DAT3) signals are dedicated to the cards, they provide continuous point-to-point connection to all the cards.
During the initialization process, commands are sent to each card individually, allowing the application to detect the cards and assign logical addresses to the physical slots. Data is always sent (received) to (from) each card individually. However, in order to simplify the handling of the card stack, after the initialization process, all commands may be sent concurrently to all cards. Addressing information is provided in the command packet. The SD bus allows dynamic configuration of the number of data lines. After power-up the SD Memory Card defaults to using only DAT0 for data transfer. After initialization the host can change the bus width (number of active data lines). This feature is an easy trade off between hardware cost and system performance.
15/61
SD卡MiniSD卡与MicroSD卡的引脚定义等资料
