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Maxim > Design Support > Technical Documents > Application Notes > Real-Time Clocks > APP 504

Maxim > Design Support > Technical Documents > Application Notes > Time and Temperature Recorders > APP 504

Keywords: battery backed, RTCs, real time clocks, crystal, 32kHz, real time clocks, oscillator, timekeeping,time keeping, 32768Hz, 32.768kHz, elapsed time counter, ETC APPLICATION NOTE 504

Design Considerations for Maxim Real-Time Clocks

Feb 15, 2002

Abstract: A real-time clock (RTC) allows a system to synchronize or time-stamp events to a time referencethat can be easily understood by the user. Because RTCs are used in an increasing number of applications,designers should familiarize themselves with these RTCs to avoid design problems. This application noteprovides a basic overview of RTC operation, design issues, and troubleshooting techniques.

Selecting an Interface

Real-time clocks (RTCs) are available in a wide range of bus interfaces. Serial interfaces include I2C, 3-wire,and Serial Peripheral Interface (SPI). Parallel interfaces include mux-bus (multiplexed data and address bus)and designs with separate address and bytewide data inputs.

The choice of interface is often determined by the type of processor being used. Many processors includeI2C or SPI interfaces. Others, such as 8051 processors and their derivatives, support multiplexed addressand data buses. Timekeeping NV RAMs use the same control signals as SRAMs, to which many processorsprovide an easy interface, and include battery-backed RAM in various densities. Finally, phantom clocks\phantom clock can therefore provide time and date information without using any memory space.

Battery Backup Function

In some applications such as VCRs, the time and date information will be lost if power is removed. Otherapplications require that the time and date remain valid even if the main power supply is off. To keep theclock oscillator running, a primary or secondary battery or a super capacitor may be used. In this case, theRTC must be able to switch between the two power supplies.

If a primary battery, such as a lithium coin cell, is used for backup, the RTC should be designed to draw aslittle power as possible when running from the battery. In this situation the RTC will switch its internal supplybus to the battery and go into a low-power mode. Communications between the microprocessor and theRTC are usually locked out (often called write protect) to keep the battery current at a minimum and toprevent data corruption. The VCC voltage level at which communications is locked out is usually defined inthe data sheet as VTP (Trip Point Voltage).

Many clocks include an oscillator control bit, usually called the clock halt (CH) or enable oscillator (EOSC)bit. This bit is usually located in bit 7 of the seconds register, or in a control register. In almost all clocks withthis bit, it is preferable that the oscillator be off when the battery is initially attached. This conserves thebattery until the system is powered up. It also allows the system designer to set up a manufacturing flow sothat no battery current is drawn after a fresh lithium battery is installed.. When the end user first powers the

with an oscilloscope probe will usually stop the oscillator. If the oscillator does not stop, the additionalloading will reduce the signal amplitude, and can cause erratic operation such as varying amplitude.Oscillation should, therefore, be verified indirectly.

Oscillation can be verified several ways. One method is to read the seconds register multiple times, lookingfor the data to increment. On RTCs with an OSF (Oscillator Stop Flag), clearing and then monitoring this bitwill verify that the oscillator has started and is continuously running. These methods will not work if the

designer is troubleshooting a design and cannot communicate with the RTC. An alternate method is to checkthe square-wave output on RTCs with a square-wave output. Check the data sheet to verify whether theRTC must be written first to enable the oscillator and square-wave output. If the square-wave output isopen-drain, a pull-up resistor must be connected between the square-wave pin and a voltage supply forproper operation. The square-wave output can also be used to verify the accuracy of the RTC, although, afrequency counter with sufficient accuracy must be used for this.

Backup Supply Input

Most Maxim RTCs include a backup supply input pin, which keeps the RTC running while the main supply isoff. Most RTCs are designed so that a lithium coin cell can be used to power the RTC while VCC is absent.When VCC is below the minimum operating value (VTP), the RTC disables the communications interface.This serves two purposes: it prevents accidental writes to the RTC while VCC is dropping; it reduces the

power needed by the RTC to maintain oscillator, time, and date operation. Disabling access to the part whenVCC is below VTP is often called \CC, the VBAT input will beat a high impedance. If a battery is not connected to the VBAT input, or if it is connected with diodes inseries (Figure 6), the VBAT input can float high. This, in turn, can cause the RTC to go into write protect.Reverse-charging protection is provided internally on most Maxim RTCs, which eliminates the need forexternal diodes. Check the following link for information about UL recognition of the reverse-chargingprotection.

Figure 6. Incorrect battery connection.

Some method must be used to prevent these read errors. Most Maxim clocks ensure that the time and dateregisters can be accessed without the values getting corrupted from an internal register update while theread or write is in progress.

A second set of registers (secondary buffer or \time and date registers are accessed, the current time and date are transferred to the secondary registers. Aburst read will take the data from the secondary registers, which remain unchanged while the internal

registers continue to update. The next access (when CE goes active on a 3-wire device or a START on I2Cinterface devices occurs) will transfer the data again. When writing to the time and date registers, the

internal countdown chain is reset when the seconds register is written. That allows the program almost onesecond in which to write the remaining time and date registers before a rollover occurs.

On timekeeping NV RAM clocks, either a transfer enable (TE) bit or (R)ead and (W)rite bits are used to\the main registers. Resetting the TE bit or the W bit after writing the user register loads the internal time anddate registers with the values from the user registers.

The block diagram in Figure 8 shows typical functions for transferring time and date information between theinternal registers and the user interface. The 32,768Hz signal from the oscillator is divided down to 1Hz by acountdown chain that has a reset input. The 1Hz signal from the countdown chain drives the BCD secondscounter/register. The ripple output from the seconds counter feeds the minutes counter/register, and so on.Changing the R and W bits in the control register synchronizes the transfer of data from the internalregisters to the user registers. The Transfer Control block sends a reset to the countdown chain when

transferring data from the user registers to the internal registers. This allows synchronization of the clock toan external reference to within approximately 244μs (most clocks do not reset the first three dividers, to the4,096Hz signal; 1/4,096Hz ≈ 244μs). Most serial-interface clocks reset the countdown chain whenever theseconds register is written.

Figure 8. Block diagram showing internal and user copy of time and date registers.

On mux-bus clocks, several methods are available to ensure that the time and date registers do not changewhile being accessed. The following methods are available:

SET Bit

When the SET bit in register B is set to a one, the user copy of the double-buffered time and date registers

is latched. The internal registers continue to update normally.

UIP Flag

The Update In Progress (UIP) flag will pulse once per second. After the UIP bit goes high, the update

transfer occurs 244μs later. If a low is read on the UIP bit, the user has at least 244μs to read the time anddate and avoid errors due to an update.

UF Interrupt

If enabled, an interrupt occurs after every update cycle, thereby indicating that over 999ms are available toread valid time and date information.

Default Register Values

Unless otherwise noted in the data sheet, the initial power-up register values are undefined. That is, theyshould be treated the same as DRAM or SRAMs; on initial powerup, the data will, for practical purposes, berandom.

Troubleshooting New Designs

The following sections discuss some RTC problems and how to troubleshoot them.

Cannot Communicate with the RTC

When trouble-shooting a new design, there are several methods to help identify the cause of this problem. Ifthe RTC appears not to respond at all, try to determine if it will not read, write, or both. If the part has asoftware-enabled feature such as a square-wave output, try to enable that feature to determine if you canwrite to the part. On I2C serial devices, an oscilloscope can be used to verify if the clock is sending anacknowledgement at the end of each byte.

The following paragraphs describe some additional trouble-shooting hints for communicating with the RTC.Battery-backed RTCs use a comparator to switch between VCC and VBAT. Some RTCs use the batteryvoltage as the reference, while others use a bandgap voltage reference to determine when VCC is valid.Once VCC drops below the comparator trip point, read and write access is not possible. Preventing accessbelow a certain voltage helps to prevent inadvertent writes from a processor that no longer has a valid

supply. Also, When VCC is above the trip point, the comparator switches the internal circuits to VCC, therebypreventing battery drain. A floating battery input, an input with a diode between the battery and VBAT, or abattery with too high a voltage can prevent communications with the RTC. Make sure that VBAT is at a validlevel and that there are no diodes between the battery and the battery input pin.

To determine whether the power-fail function is causing problems reading and writing the RTC, it is oftenuseful to observe a function that only operates when the RTC is out of power-fail (i.e., operating on VCC).Some RTCs have a RST or PFO output that can be observed. Since these outputs are often open-drain, apull-up resistor may be needed. On other devices, such as the DS12887 and other multiplexed-bus parts,the square-wave output only operates when the part is operating on VCC. On some devices, including manyserial-interface RTCs, the square-wave output is open-drain, and a pull-up resistor must be in place toobserve the signal. Consequently, check the RTC's data sheet to determine if it has a square-wave outputsignal. If read/write access is intermittent, use an oscilloscope to see if the output is also intermittent.Serial clocks require that the \

incorrect command/address often causes the device to ignore read routines. In those cases, the data I/O pinstays in a high-impedance state. On a serial bus with pull-up resistors, the data read back will usually be0xff. On 3-wire interfaces, if the I/O pin has an internal pull-down resistor, the data will often be 0. In other