AppendixA
Recommended PCB Design Rules
BGA Packages
Xilinx provides the diameter of a land pad on the package side. This information is required prior to the start of the board layout so the board pads can be designed to match the component-side land geometry. The typical values of these land pads are described in FigureA-1 and summarized in TableA-1 for both 0.8 mm and 1.0 mm pitch packages. For Xilinx BGA packages, non-solder mask defined (NSMD) pads on the board are suggested to allow a clearance between the land metal (diameter L) and the solder mask opening
(diameter M) as shown in FigureA-1. An example of an NSMD PCB pad solder joint is shown in FigureA-2. It is recommended to have the board land pad diameter with a 1:1 ratio to the package solder mask defined (SMD) pad for improved board level reliability. The space between the NSMD pad and the solder mask as well as the actual signal trace widths depend on the capability of the PCB vendor. The cost of the PCB is higher when the line width and spaces are smaller
X-Ref Target - Figure A-1MLOpening inSolder Mask (M)Solder Land (L)Solder MaskeUG865_aA_01_092713Figure A-1:Suggested Board Layout of Soldered Pads for BGA Packages
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Chapter 5:Thermal Specifications
Zynq-7000SoC Packaging GuideUG865 (v1.8.1) June 22, 2018
Appendix A:Recommended PCB Design Rules
X-Ref Target - Figure A-2BGA PackageSMDBGA Solder BallSolder MaskLLand PadPCBMUG865_aA_02_110513Figure A-2:
Table A-1:
BGA Package Design Rules
PackagesDesign Rule
Package land pad opening (SMD)Maximum PCB solder land (L) diameterOpening in PCB solder mask (M) diameterSolder ball land pitch (e)
Notes:
Example of an NSMD PCB Pad Solder Joint
0.8 mm Pitch SB/SBG/SBV, CL/CLG
0.40 mm (15.7 mils)0.40 mm (15.7 mils)0.50 mm (19.7 mils)0.80 mm (31.5 mils)
1.0 mm Pitch
FF/FFG/FFV, FB/FBG/FBV, RF/RFG
0.53 mm (20.9 mils)0.53 mm (20.9 mils)0.63 mm (24.8 mils)1.00 mm (39.4 mils)
Dimensions in mm (mils)
1.Controlling dimension in mm.
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Appendix B:Heat Sink Guidelines for Lidless Flip-Chip Packages
X-Ref Target - Figure B-2PreferredDecouplingCapacitorMetalTipNozzleSoft TipsDecouplingCapacitorIncorrect Pickup MethodMetalTipNozzleSiliconSubstrateSiliconSubstrateMetal Pick Up Tip Nozzle with Soft Tips orSuction Cups is PreferredMetal Pick Up Tip Nozzle Can Damagethe Exposed SiliconUG475_aB_02_013113Figure B-2:Recommended Method For Using Pick-up Tools
Zynq-7000SoC Packaging GuideUG865 (v1.8.1) June 22, 2018
Appendix B:Heat Sink Guidelines for Lidless Flip-Chip Packages
Heat Sink Attachment Process Considerations
After the component is placed onto the PCBs, when attaching a heat sink to the lidless package, the factors in TableB-2 must be carefully considered (see FigureB-3).
Table B-2:
Heat Sink Attachment Considerations
Effect(s)
Recommendation(s)
?Even heat sink placement?Even TIM thickness
?Even force applied when placing heat sinkplacement
Consideration(s)
In heat sink attach process, ?Uneven heat sink placementwhat factors can cause ?Uneven TIM thicknessdamage to the expose die and
?Uneven force applied whenpassive capacitors?
placing heat sink placementDoes the heat sink tilt or tip the post attachment?
Uneven heat sink placement will ?Careful handling not to contact the heatdamage the silicon and can sink with the post attachment.cause field failures.?Use a fixture to hold the heat sink in place
with post attachment until it is glued tothe silicon.
X-Ref Target - Figure B-3PreferredEven ForceEven ForceDecouplingCapacitorSiliconSubstrateIncorrect AlignmentDecouplingCapacitorSiliconSubstrateEven ForcePreferredEven ForceIncorrect ForceHeat SinkSiliconSubstrateMother BoardSiliconSubstrateDecouplingCapacitorPreferred Application of Heatsink1.Heatsink is Aligned Parallel to Silicon2.Even Bond Line Thickness of TIM3.Even Compressive Force Applied On All SidesImproper Application of Heatsink Can Damage to Heatsink1.Heatsink is Not Aligned Parallel to Silicon2.Uneven Bond Line Thickness of TIM3.Uneven Force AppliedUG475_aB_03_013113Figure B-3:Recommended Application of Heat Sink
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FPGA可编程逻辑器件芯片XC7Z045-2FFG676I中文规格书
