ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
FEATURES
TIA/EIA RS-485/RS-422 compliant
±15 kV ESD protection on RS-485 input/output pins Data rates
ADM3483E/ADM3488E: 250 kbps ADM3486E: 2.5 Mbps
ADM3490E/ADM3491E: 12 Mbps Half- and full-duplex options Up to 32 nodes on the bus
Receiver open-circuit, fail-safe design Low power shutdown current
(ADM3483E/ADM3486E/ADM3491E only) Outputs high-Z when disabled or powered off Common-mode input range: ?7 V to +12 V
Thermal shutdown and short-circuit protection Industry-standard 75176 pinout
8-lead and 14-lead narrow SOIC packages
APPLICATIONS
Power/energy metering Telecommunications EMI-sensitive systems Industrial control Local area networks
GENERAL DESCRIPTION
The ADM3483E/ADM3486E/ADM3488E/ADM3490E/ ADM3491E are 3.3 V, low power data transceivers with ±15 kV ESD protection suitable for full- and half-duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission, and they comply with TIA/EIA standards RS-485 and RS-422. The ADM3483E/ADM3486E are half-duplex transceivers that share differential lines and have separate enable inputs for the driver and receiver. The full-duplex ADM3488E/ ADM3490E/ADM3491E transceivers have dedicated differential line driver outputs and receiver inputs. The ADM3491E also features separate enable inputs for the driver and receiver.
The devices have a 12 kΩ receiver input impedance,
which allows up to 32 transceivers on a bus. Because only one driver should be enabled at any time, the output of a disabled or powered-down driver is tristated to avoid overloading the bus.
FUNCTIONAL BLOCK DIAGRAMS
VCCADM3483E/ADM3486ERORREADEBDID100-4GND8260Figure 1.
VCCADM3488E/ADM3490ERORABDIDZY200-4GND8260
Figure 2.
VCCADM3491ERORABREDEDIDZY300-4GND8260
Figure 3.
(continued on Page 3)
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491ESPECIFICATIONS
VCC = 3.3 V ± 0.3 V, TA = TMIN to TMAX, unless otherwise noted.
Table 2. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E ParameterDRVERDifferential Outputs Differential Output Voltage Symbol Min Typ Max Unit Test Conditions/CommentsVODΔ|VOD| for Complementary Output States1 ?VOD Common-Mode Output Voltage VOCΔ|VOC| for Complementary Output States1 ?VOCShort-Circuit Output Current IOSDOutput Leakage (Y, Z) (ADM3491E Only) Normal Mode IO2.0 V RL = 100 Ω (RS-422) (see Figure 7) 1.5 V RL = 54 Ω (RS-485) (see Figure 7) 1.5 V RL = 60 Ω (RS-485) (see Figure 8) 0.2 V RL = 54 Ω or 100 Ω (see Figure 7) 3 V RL = 54 Ω or 100 Ω (see Figure 7) 0.2 V RL = 54 Ω or 100 Ω (see Figure 7) ?250 mA VOUT = ?7 V 250 mAVOUT = 12 V DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VOUT = 12 V ?20 μA DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, VOUT = ?7 V 1 μA DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, VOUT = 12 V ?1 μA DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, VOUT = ?7 V 20 μA Shutdown Mode Logic Inputs Input High Voltage Input Low Voltage Logic Input Current RECEVERDifferential Inputs Differential Input Threshold Voltage Input Hysteresis Input Resistance (A, B) Input Current (A, B) RO Logic Output Output High Voltage Output Low Voltage Short-Circuit Output Current Tristate Output Leakage Current POWER SUPPLY Voltage Range Supply Current VIHVILIIN12.0 V DE, DI, RE 0.8 V DE, DI, RE ±2 μA DE, DI, RE VTH ?VTHRINIIN2 ?0.2 12?0.8 0.2 V ?7 V < VCM < +12 V 50 mV VCM = 0 V ?7 V < VCM < +12 V k? 1.0 mA DE = 0 V, VCC = 0 V or 3.6 V, VIN = 12 V mA DE = 0 V, VCC = 0 V or 3.6 V, VIN = ?7 V V IOUT = ?1.5 mA, VID = 200 mV (see Figure 9) 0.4 V IOUT = 2.5 mA, VID = 200 mV (see Figure 9) ±60 mA 0 V < VRO < VCC ±1 μA VCC = 3.6 V, 0 V < VOUT < VCC VOHVOLIOSRIOZRVCCICCVCC ? 0.4 ±8Shutdown Current ESD PROTECTION A, B, Y, Z Pins All Pins Except A, B, Y, Z Pins 1
3.6 V1.1 2.2 mA No load, DI = 0 V or VCC, DE = VCC, RE = 0 V or VCC 0.95 1.9 mA No load, DI = 0 V or VCC, DE = 0 V, RE = 0 V ISHDN0.002 1 μA DE = 0 V, RE = VCC, DI = 0 V or VCC ±15 ±4 kV kV Human body model Human body model 3.0 Δ|VOD| and Δ|VOC| are the changes in VOD and VOC, respectively, when DI input changes state.
Rev. A | Page 4 of 20
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
DRIVER TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C.
Table 3. ADM3483E/ADM3488E
Parameter
MAXIMUM DATA RATE
DIFFERENTIAL OUTPUT DELAY
DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level
|tPLH ? tPHL| PROPAGATION DELAY SKEW1
ENABLE/DISABLE TIMING (ADM3483E ONLY) Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level
Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level
1
Symbol Min Typ Max Unit Test Conditions/Comments
250 kbps
tDD600 900 1400 ns RL = 60 Ω (see Figure 10) tTD400 740 1200 ns RL = 60 Ω (see Figure 10) tPLHtPHLtPDStPZLtPZHtPLZtPHZtPSLtPSH
700 930 1500 ns RL = 27 Ω (see Figure 11) 700 930 1500 ns RL = 27 Ω (see Figure 11) ±50ns RL = 27 Ω (see Figure 11) 900 1300 ns RL = 110 Ω (see Figure 13) 600 800 ns RL = 110 Ω (see Figure 12) 50 80 ns RL = 110 Ω (see Figure 13) 50 80 ns RL = 110 Ω (see Figure 12) 1.9 2.7 μs RL = 110 Ω (see Figure 13) 2.2 3.0 μs RL = 110 Ω (see Figure 12)
Measured on |tPLH (Y) ? tPHL (Y)| and |tPLH (Z) ? tPHL (Z)|.
VCC = 3.3 V, TA = 25°C. Table 4. ADM3486E
Parameter
MAXIMUM DATA RATE
DIFFERENTIAL OUTPUT DELAY
DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level
|tPLH ? tPHL| PROPAGATION DELAY SKEW1ENABLE/DISABLE TIMING Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level
Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level
1
Symbol Min Typ Max Unit Test Conditions/Comments
2.5 Mbps
tDD20 42 70 ns RL = 60 Ω (see Figure 10) tTD15 28 60 ns RL = 60 Ω (see Figure 10) tPLHtPHLtPDStPZLtPZHtPLZtPHZtPSLtPSH
20 42 75 ns RL = 27 Ω (see Figure 11) 20 42 75 ns RL = 27 Ω (see Figure 11) ?6 ±12 ns RL = 27 Ω (see Figure 11) 52 100 ns RL = 110 Ω (see Figure 13) 52 100 ns RL = 110 Ω (see Figure 12) 40 80 ns RL = 110 Ω (see Figure 13) 40 80 ns RL = 110 Ω (see Figure 12) 700 1000 ns RL = 110 Ω (see Figure 13) 700 1000 ns RL = 110 Ω (see Figure 12)
Measured on |tPLH (Y) ? tPHL (Y)| and |tPLH (Z) ? tPHL (Z)|.
Rev. A | Page 5 of 20
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
VCC = 3.3 V, TA = 25°C.
Table 5. ADM3490E/ADM3491E
Parameter
MAXIMUM DATA RATE
DIFFERENTIAL OUTPUT DELAY
DIFFERENTIAL OUTPUT TRANSITION TIME PROPAGATION DELAY From Low to High Level From High to Low Level
|tPLH ? tPHL| PROPAGATION DELAY SKEW1
ENABLE/DISABLE TIMING (ADM3491E ONLY) Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level
Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level
1
Symbol Min Typ Max Unit Test Conditions/Comments
12 15 Mbps
tDD1 22 35 ns RL = 60 Ω (see Figure 10) tTD3 11 25 ns RL = 60 Ω (see Figure 10) tPLHtPHLtPDStPZLtPZHtPLZtPHZtPSLtPSH
7 23 35 ns RL = 27 Ω (see Figure 11) 7 23 35 ns RL = 27 Ω (see Figure 11)
?1.4 ±8 ns RL = 27 Ω (see Figure 11)
42 90 ns RL = 110 Ω (see Figure 13) 42 90 ns RL = 110 Ω (see Figure 12) 35 80 ns RL = 110 Ω (see Figure 13) 35 80 ns RL = 110 Ω (see Figure 12) 650 900 ns RL = 110 Ω (see Figure 13) 650 900 ns RL = 110 Ω (see Figure 12)
Measured on |tPLH (Y) ? tPHL (Y)| and |tPLH (Z) ? tPHL (Z)|.
RECEIVER TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C.
Table 6. ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
Parameter
PROPAGATION DELAY From Low to High Level
ADM3486E/ADM3490E/ADM3491EADM3483E/ADM3488EFrom High to Low Level
ADM3486E/ADM3490E/ADM3491EADM3483E/ADM3488E
|tRPLH ? tRPHL| PROPAGATION DELAY SKEW ADM3486E/ADM3490E/ADM3491EADM3483E/ADM3488E
ENABLE/DISABLE TIMING (ADM3483E/ADM3486E/ ADM3491E ONLY)
Enable Time to Low Level Enable Time to High Level Disable Time from Low Level Disable Time from High Level
Enable Time from Shutdown to Low Level Enable Time from Shutdown to High Level Time to Shutdown1
1
Symbol Min Typ Max Unit Test Conditions/CommentstRPLH
25 62 90 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) 25 75 120 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) tRPHL
25 62 90 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14)
25 75 120 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) tRPDS
+6 ±10 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14) +12 ±20 ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14)
tRPZL25 50 ns CL = 15 pF (see Figure 15)
tRPZH25 50 ns CL = 15 pF (see Figure 15) tRPLZ25 45 ns CL = 15 pF (see Figure 15) tRPHZ25 45 ns CL = 15 pF (see Figure 15) tRPSL720 1400 ns CL = 15 pF (see Figure 15) tRPSH720 1400 ns CL = 15 pF (see Figure 15) tSHDN 80 190 300 ns The transceivers are put into shutdown mode by bringing the RE high and the DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown.
Rev. A | Page 6 of 20
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Table 7. ParameterVCC to GND Digital Input/Output Voltage (DE, RE, DI) Receiver Output Voltage (RO) Driver Output (A, B, Y, Z)/Receiver Input (A, B) Voltage Driver Output Current Operating Temperature Range Storage Temperature Range θJA Thermal Impedance 8-Lead SOIC_N 14-Lead SOIC_N Lead Temperature, Soldering (20 sec) Rating?0.3 V to +6 V ?0.3 V to +6 V ?0.3 V to (VCC + 0.3 V) ?8 V to +13 V ±250 mA ?40°C to +85°C ?65°C to +150°C 158°C/W 120°C/W 260°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. A | Page 7 of 20
MEMORY存储芯片ADM3483EARZ中文规格书 - 图文
