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for external timing or clocking purposes Note however that one ALE pulse is skipped during each access to external Data Memory If desired ALE operation can be disabled by setting bit 0 of SFR location 8EH With the bit set ALE is active only during a MOVX or MOVC instruction Otherwise the pin is weakly pulled high Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode
Program Store Enable is the read strobe to external program memory When the AT89C51 is executing code from external program memory is activated twice each machine cycle except that two activations are skipped during each access to external data memory
VPP
External Access Enable must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH Note however that if lock bit 1 is programmed will be internally latched on reset should be strapped to VC C for internal program executions This pin also receives the 12-volt programming enable voltage VPP during Flash programming for parts that require 12-volt VPP
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit
XTAL2
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Output from the inverting oscillator amplifier 6 Oscillator Characteristics
XTAL1 and XTAL2 are the input and output respectively of an inverting amplifier which can be configured for use as an on-chip oscillator as shown in Figure 1 Either a quartz crystal or ceramic resonator may be used To drive the device from an external clock source XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2 There are no requirements on the duty cycle of the external clock signal since the input to the internal clocking circuitry is through a divide-by-two flip-flop but minimum and imum voltage high and low time specifications must be observed
Oscillator Connections
Note C1 C2 30 pF±10 pF for Crystals 40 pF±10 pF for Ceramic Resonators External Clock Drive Configuration 7 Idle Mode
In idle mode the CPU puts itself to sleep while all the on-chip peripherals remain active The mode is invoked by software The content of the on-chip RAM and all the special functions registers remain unchanged during this mode The idle mode can be terminated by any enabled interrupt or by a hardware reset It should be noted that when idle is terminated by a hard ware reset the device normally resumes program execution from
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where it left off up to two machine cycles before the internal reset algorithm takes control On-chip hardware inhibits access to internal RAM in this event but access to the port pins is not inhibited To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory
8 Power-down Mode
In the power-down mode the oscillator is stopped and the instruction that invokes power-down is the last instruction executed The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated The only exit from power-down is a hardware reset Reset redefines the SFRs but does not change the on-chip RAM The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize
9 Programming the Flash
The AT89C51 is normally shipped with the on-chip Flash memory array in the erased state that is contents FFH and ready to be programmed The programming interface accepts either a high-voltage 12-volt or a low-voltage VCC program enable signal The low-voltage programming mode provides a convenient way to program the AT89C51 inside the users system while the high-voltage programming mode is compatible with conventional
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third party Flash or EPROM programmers The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled The respective top-side marking and device signature codes are listed in the following table
The AT89C51 code memory array is programmed byte-by-byte in either programming mode To program any nonblank byte in the on-chip Flash Memory the entire memory must be erased using the Chip Erase Mode
10 Flash Programming and Verification Characteristics TA 0°C to 70°C VCC 50±10
Note 1 Only used in 12-volt programming mode 11 DC Characteristics
TA -40°C to 85°C VCC 50V±20 unless otherwise noted Notes
1 under steady state non-transient conditions IOL must be externally limited as follows
imum IOL per port pin 10 mA
imum IOL per 8-bit port Port 0 26 mA Ports 1 2 3 15 mA
imum total IOL for all output pins 71 mA
If IOL exceeds the test condition VOL may exceed the related specification Pins are not guaranteed to sink current greater than the listed test conditions
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2Minimum VCC for Power-down is 2V
12 External Program and Data Memory Characteristics 13 External Program Memory Read Cycle 14 External Data Memory Read Cycle 15 External Data Memory Write Cycle 16 External Clock Drive Waveforms 17 External Clock Drive
18 Serial Port Timing Shift Register Mode Test Conditions VCC 50 V 20 Load Capacitance 80 pF 19 Shift Register Mode Timing Waveforms 20 Ring Information 21 Packaging Information AT89C51系列用户指南
1 主要性能参数MCS-51 产品指令系统完全兼容k 字节可重擦写 Flash 闪速存储器
1000次擦写全静态操作0Hz－24MHz 三级加密程序存储器 128×8 字节内部 RAM 32个可编程 I／O 口线 2个 16 位定时／计数器 6个中断源程串行UART 通道
2 功能特性概述AT89C51 是美国 ATMEL 公司生产的低电压高性能 CMOS8
基于51单片机的电子数字钟设计的外文翻译
