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MEMORY存储芯片MAX489EESD中文规格书 - 图文

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MAX481E/MAX483E/MAX485E/ MAX487E–MAX491E/MAX1487E

±15kV ESD-Protected, Slew-Rate-Limited,Low-Power, RS-485/RS-422 Transceivers3VDECL1ADIYRVDIFFROIDZBCREL2Figure 10. Driver/Receiver Timing Test Circuit3VDI1.5V1.5V0VtPLHtPHL1/2 VOZVYO1/2 VOVDIFF = V (Y) - V (Z)VVDIFFO0V90?%-VO10%tRtFtSKEW = | tPLH- tPHL |Figure 12. Driver Propagation DelaysROVOHVOL1.5VOUTPUT1.5VVIDtPHLtA-BPLH-VID0VINPUT0VFigure 14. Receiver Propagation DelaysOUTPUT500ΩS1VCCUNDER TESTCLS2Figure 11. Driver Timing Test Load3VDE1.5V1.5V0VtY, ZZL(SHDN), tZLtLZV2.3VOUTPUT NORMALLY LOWVOLOL +0.5VY, ZOUTPUT NORMALLY HIGHV0V2.3VOH -0.5VtZH(SHDN), tZHtHZFigure 13. Driver Enable and Disable Times (except MAX488Eand MAX490E)3VRE1.5V1.5V0VtVZL(SHDN), tZLtLZCCRO1.5VOUTPUT NORMALLY LOWVOL + 0.5VOUTPUT NORMALLY HIGHRO1.5VVOH - 0.5V0VtZH(SHDN), tZHtHZFigure 15. Receiver Enable and Disable Times (except MAX488Eand MAX490E)11

MAX481E/MAX483E/MAX485E/ MAX487E–MAX491E/MAX1487E

±15kV ESD-Protected, Slew-Rate-Limited,Low-Power, RS-485/RS-422 Transceivers100pFZBTTL INtR, tF < 6nsDRRECEIVEROUTYR = 54ΩA100pFFigure 18. Receiver Propagation Delay Test CircuitIt takes the drivers and receivers longer to becomeenabled from the low-power shutdown state (tZH(SHDN),tZL(SHDN)) than from the operating mode (tZH, tZL). (Theparts are in operating mode if the RE, DE inputs equal alogical 0,1 or 1,1 or 0, 0.)

Driver Output Protection Excessive output current and power dissipation causedby faults or by bus contention are prevented by twomechanisms. A foldback current limit on the output stageprovides immediate protection against short circuits overthe whole common-mode voltage range (see TypicalOperating Characteristics). In addition, a thermal shut-down circuit forces the driver outputs into a high-imped-ance state if the die temperature rises excessively.

Propagation DelayMany digital encoding schemes depend on the differ-ence between the driver and receiver propagation

Maxim Integrateddelay times. Typical propagation delays are shown inFigures 19–22 using Figure 18’s test circuit.

The difference in receiver delay times, tPLH- tPHL, istypically under 13ns for the MAX481E, MAX485E,MAX490E, MAX491E, and MAX1487E, and is typicallyless than 100ns for the MAX483E and MAX487E–MAX489E.

The driver skew times are typically 5ns (10ns max) forthe MAX481E, MAX485E, MAX490E, MAX491E, andMAX1487E, and are typically 100ns (800ns max) for theMAX483E and MAX487E–MAX489E.

Typical ApplicationsThe MAX481E, MAX483E, MAX485E, MAX487E–MAX491E, and MAX1487E transceivers are designed forbidirectional data communications on multipoint bustransmission lines. Figures 25 and 26 show typical net-work application circuits. These parts can also be used asline repeaters, with cable lengths longer than 4000 feet.To minimize reflections, the line should be terminated atboth ends in its characteristic impedance, and stublengths off the main line should be kept as short as possi-ble. The slew-rate-limited MAX483E and MAX487E–MAX489E are more tolerant of imperfect termination.Bypass the VCCpin with 0.1μF.

Isolated RS-485For isolated RS-485 applications, see the MAX253 andMAX1480 data sheets.

Line Length vs. Data RateThe RS-485/RS-422 standard covers line lengths up to4000 feet. Figures 23 and 24 show the system differen-tial voltage for the parts driving 4000 feet of 26AWGtwisted-pair wire at 110kHz into 100Ωloads.

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MEMORY存储芯片MAX489EESD中文规格书 - 图文

MAX481E/MAX483E/MAX485E/MAX487E–MAX491E/MAX1487E±15kVESD-Protected,Slew-Rate-Limited,Low-Power,RS-485/RS-422Transceivers3VDECL1ADIYRVDIFFROIDZBCREL2Figure10.Driver/ReceiverTimingTe
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