TPS56C2153.8-Vto17-VInput,12-ASynchronousStep-DownSWIFT?Converter
1Features
2Applications
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Server,Cloud-Computing,Storage
Telecom&Networking,Point-of-Load(POL)IPCs,FactoryAutomation,PLC,TestMeasurementHighendDTV
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Integrated13.5-mΩand4.5-mΩMOSFETsSupport12-AContinuousIOUT
4.5-VStartupwithoutExternal5.0-VBias0.6V+/-1%ReferenceVoltageacrossfulltemperaturerange
0.6Vto5.5VOutputVoltageRangeSupportsCeramicOutputCapacitors
D-CAP3?ControlModeforFastTransientResponse
SelectableForcedContinuousConductionMode(FCCM)forTightOutputVoltageRippleorAuto-SkippingEco-mode?forHighLight-LoadEfficiency
SelectableFSWof400kHz,800kHzand1.2MHzMonotonicStartUpintoPre-biasedOutputs
TwoAdjustableCurrentLimitSettingswithHiccupRe-start
OptionalExternal5VbiasforEnhancedEfficiencyAdjustableSoftStartwithaDefault1-msSoftStartTime
–40°Cto150°COperatingJunctionTemperatureSmall3.5-mmx3.5-mmHotRod?QFNPackageSupportedattheWEBENCH?DesignCenter
3Description
TheTPS56C215isTI'ssmallestmonolithic12-Asynchronousbuckconverterwithanadaptiveon-timeD-CAP3?controlmode.ThedeviceintegrateslowRDS(on)powerMOSFETsthatenablehighefficiencyandoffersease-of-usewithminimumexternalcomponentcountforspace-consciouspowersystems.Competitivefeaturesincludeaveryaccuratereferencevoltage,fastloadtransientresponse,auto-skipmodeoperationforlightloadefficiency,adjustablecurrentlimitandnorequirementforexternalcompensation.AforcedcontinuousconductionmodehelpsmeettightvoltageregulationaccuracyrequirementsforperformanceDSPsandFPGAs.TheTPS56C215isavailableinathermallyenhanced18-pinHotRod?QFNpackageandisdesignedtooperatefrom–40°Cto150°Cjunctiontemperature.
DeviceInformation(1)
PARTNUMBERTPS56C215
PACKAGEVQFN(18)
BODYSIZE(NOM)3.5mmx3.5mm
(1)Forallavailablepackages,seetheorderableaddendumat
theendofthedatasheet.
TypicalApplication
TPS56C215VREG5VINPGOODspacerEfficiencyvsOutputCurrent95LOUTCOUTENSWFBAGNDPGNDVOUT OUTRUPPERRLOWEREfficiency(%) VINCINMODEBOOTRM_HRM_LVREG59085807570V =4.5V,V =1.2V,400kHzOUT IN V =12V, V =1.2V, 400kHzOUT IN V =17V, V =1.2V, 400kHzOUT IN 0123456789101112C001 PGOODCSSSSCopyright ? 2016, Texas Instruments Incorporated65Output Current(A) TPS56C215
SLVSD05C–MARCH2016–REVISEDMARCH2024
5PinConfigurationandFunctions
RNNPackage18-PinVQFN
BOTTOM VIEW
16 PGOOD17 VREG518 MODE18 MODETOP VIEW
16 PGOOD17 VREG514 SS15 EN15 EN13 FB14 SSAGND 121 BOOTBOOT 1
13 FB12 AGND
VIN 112 VINVIN 211 VIN
PGND 10PGND 9PGND 8
7 SW
6
3 PGND4 PGND5 PGND
PGND 3PGND 4PGND 5
6
7
10 PGND9 PGND8 PGND
SW
PinFunctions
PIN
NAMEBOOTVINPGNDSWAGNDFBSSENPGOODVREG5MODE
NO.12,113,4,5,8,9,106,712131415161718
I/OIPGOGIOIOI/OI
DESCRIPTION
Supplyinputforthegatedrivevoltageofthehigh-sideMOSFET.ConnectthebootstrapcapacitorbetweenBOOTandSW.
Inputvoltagesupplypinforthecontrolcircuitry.ConnecttheinputdecouplingcapacitorsbetweenVINandPGND.
PowerGNDterminalforthecontrollercircuitandtheinternalcircuitry.ConnecttoAGNDwithashorttrace.Switchnodeterminal.Connecttheoutputinductortothispin.
Groundofinternalanalogcircuitry.ConnectAGNDtoPGNDplanewithashorttrace.
Converterfeedbackinput.ConnecttothecentertapoftheresistordividerbetweenoutputvoltageandAGND.
Soft-Starttimeselectionpin.Connectinganexternalcapacitorsetsthesoft-starttimeandifnoexternalcapacitorisconnected,theconverterstartsupin1ms.
Enableinputcontrol,leavingthispinfloatingenablestheconverter.ItcanalsobeusedtoadjusttheinputUVLObyconnectingtothecentertapoftheresistordividerbetweenVINandEN.
OpenDrainPowerGoodIndicator,itisassertedlowifoutputvoltageisoutofPGOODthreshold,Overvoltageorifthedeviceisunderthermalshutdown,ENshutdownorduringsoftstart.
4.7-VinternalLDOoutputwhichcanalsobedrivenexternallywitha5Vinput.Thispinsuppliesvoltagetotheinternalcircuitryandgatedriver.Bypassthispinwitha4.7-μFcapacitor.
SwitchingFrequency,CurrentLimitselectionandLightloadoperationmodeselectionpin.ConnectthispintoaresistordividerfromVREG5andAGNDfordifferentMODEoptionsshowninTable3.
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6Specifications
6.1AbsoluteMaximumRatings
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
VINSW
SW(10nstransient)
InputVoltage
ENBOOT–SWBOOTSS,MODE,FBVREG5
OutputVoltageOutputCurrent(2)TJTstg(1)(2)
PGOODIOUT
OperatingjunctiontemperatureStoragetemperature
–40–55
(1)
MIN–0.3–2–3–0.3–0.3–0.3–0.3–0.3–0.3
MAX2024206.56.525.56.566.514150150
UNITVVVVVVVVVA°C°C
StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
InordertobeconsistentwiththeTIreliabilityrequirementof100kPower-On-Hoursat105°Cjunctiontemperature,theoutputcurrentshouldnotexceed14Acontinuouslyunder100%dutyoperationastopreventelectromigrationfailureinthesolder.Higherjunctiontemperatureorlongerpower-onhoursareachievableatlowerthan14Acontinuosoutputcurrent.
6.2ESDRatings
VALUE
Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1)
V(ESD)(1)(2)
Electrostaticdischarge
Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2)
±2000±500
VUNIT
JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.
6.3RecommendedOperatingConditions
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
MIN
VIN
InputVoltage
SWBOOTVREG5
OutputCurrentOperatingjunctiontemperature
ILOADTJ
3.8–1.8–0.1–0.10-40
NOM
MAX171723.55.212150
UNITVVVVA°C
6.4ThermalInformation
THERMALMETRIC(1)
RθJARθJC(top)RθJBψJT(1)
Junction-to-ambientthermalresistanceJunction-to-case(top)thermalresistanceJunction-to-boardthermalresistanceJunction-to-topcharacterizationparameter
RNNPACKAGE
18PINS29.517.08.60.4
UNIT°C/W°C/W°C/W°C/W
Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953.
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7.2FunctionalBlockDiagram
TPS56C215PG rising threshold+PGOOD LogicPGOOD
UV thresholdUV++Delay+OVUVP / OVP LogicVREG5
PG falling thresholdLDOOV thresholdVIN
Internal RampVREFError Amp+UVLOBOOT-+-++Control Logicx??x??x??x??x??x??x??On TimeMin On Time/Off TimeFCCM/SKIPSoft-StartPower GoodInternal/External VREG5UVP/TSDBOOT
FB
-Internal SSOne shotSWSW
XCONVREG5SS
PGND
Light Load Operation/Current Limit/Switching FrequencyMODE
TSD 160C/171CSW
OCLIp1Ip2EN
+ZCEnable ThresholdNOCL7.3FeatureDescription
7.3.1PWMOperationandD-CAP3?Control
TheTPS56C215operatesusingtheadaptiveon-timePWMcontrolwithaproprietaryD-CAP3?controlwhichenableslowexternalcomponentcountwithafastloadtransientresponsewhilemaintainingagoodoutputvoltageaccuracy.AtthebeginningofeachswitchingcyclethehighsideMOSFETisturnedonforanon-timesetbyaninternaloneshottimer.Thison-timeissetbasedontheconverter’sinputvoltage,outputvoltageandthepseudo-fixedfrequencyhencethistypeofcontroltopologyiscalledanadaptiveon-timecontrol.Theoneshottimerresetsandturnsonagainoncethefeedbackvoltage(VFB)fallsbelowtheinternalreferencevoltage(VREF).AninternalrampisgeneratedwhichisfedtotheFBpintosimulatetheoutputvoltageripple.Thisenablestheuseofverylow-ESRoutputcapacitorssuchasmulti-layeredceramiccaps(MLCC).NoexternalcurrentsensenetworkorloopcompensationisrequiredforDCAP3?controltopology.
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+++Copyright ? 2016, Texas Instruments IncorporatedTPS56C215
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MEMORY存储芯片TPS56C215RNNR中文规格书 - 图文
