nrf51822学习笔记之WDT

Watchdog timer (WDT)

The counter reload value is specified in the CRV register, and the timer is started using the START task. The watchdog’s timeout period is given by:

When started, the watchdog will automatically force the 32.768 kHz RC oscillator on.

typedef struct { // WDT Structure

__O uint32_t TASKS_START; // Start the watchdog. __I uint32_t RESERVED0[63];

__IO uint32_t EVENTS_TIMEOUT; // Watchdog timeout. __I uint32_t RESERVED1[128];

__IO uint32_t INTENSET; //Interrupt enable set register. __IO uint32_t INTENCLR; //Interrupt enable clear register. __I uint32_t RESERVED2[61];

__I uint32_t RUNSTATUS; // Watchdog running status. __I uint32_t REQSTATUS; // Request status. __I uint32_t RESERVED3[63];

__IO uint32_t CRV; // Counter reload value in number of 32kiHz clock cycles. __IO uint32_t RREN; // Reload request enable. __IO uint32_t CONFIG; // Configuration register. __I uint32_t RESERVED4[60];

__O uint32_t RR[8]; // Reload requests registers. __I uint32_t RESERVED5[631];

__IO uint32_t POWER; //Peripheral power control. } NRF_WDT_Type;