FEATURES
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All-silicon timing circuit
Three independent buffered delaysInitial delay tolerance ±1.5 ns
Stable and precise over temperature andvoltage
Leading and trailing edge precision preservesthe input symmetry
Standard 8-pin DIP, 8-pin SOIC
Vapor phasing, IR and wave solderableAvailable in Tape and Reel
PIN ASSIGNMENT
IN1IN2IN3GND12348765VCCOUT1OUT2OUT3DS1033M 8-Pin DIPSee Mech. Drawings SectionIN1IN2IN3GND12348765VCCOUT1OUT2OUT3DS1033Z 8-Pin SOIC (150-mil)See Mech. Drawings Section
PIN DESCRIPTION
IN1-IN3 - Input SignalsOUT1-OUT3 - Output SignalsNC - No ConnectionVCC -Supply VoltageGND-Ground(Sub)-Internal substrate
connection, do not makeany external connectionsto these pins
DESCRIPTION
The DS1033 series is a low-power +3.3 Volt version of the DS1035. It is characterized for operationover the range of 2.7V to 3.6V.
The DS1033 series of delay lines have three independent logic buffered delays in a single package. It isavailable in a standard 8-pin DIP, 150-mil 8-pin mini-SOIC.
The device features precise leading and trailing edge accuracies. It has the inherent reliability of an all-silicon delay line solution. The DS1033’s nominal tolerance is ±1.5 ns and an additional tolerance overtemperature and voltage of ±1.0 ns for the faster delays. Detailed specifications are shown in Table 1.Standard delay values are indicated in Table 1. Customers may contact Dallas Semiconductor at (972)371-4348 for further information.
111799
DS1033
LOGIC DIAGRAM Figure 1
PART NUMBER DELAY TABLE (tPLH , tPHL) Table 1
DELAY PEROUTPUT (ns)(note 1)8/8/810/10/1012/12/1215/15/1520/20/2025/25/2530/30/30
INITIALTOLERANCE
(note 1)
±1.5 ns±1.5 ns±1.5 ns±1.5 ns±1.5 ns±2.0 ns±2.0 ns
TOLERANCE OVER TEMPERATURE
AND VOLTAGE (note 2)
VCC=2.7VVCC=3.3V ±=0.3V
±1.0 ns±1.5 ns±1.0 ns±1.5 ns±1.0 ns±1.5 ns±1.5 ns±2.0 ns±1.5 ns±2.5 ns±2.0 ns±3.5 ns±2.0 ns±5.0 ns
PART NUMBERDS1033-80DS1033-10DS1033-12DS1033-15DS1033-20DS1033-25DS1033-30
NOTES:
1.Nominal conditions are +25°C and VCC=+3.3 volts.2.Temperature range of 0°C to 70°C.
3.Delay accuracy is for both leading and trailing edges.
DS1033
TEST SETUP DESCRIPTION
Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1033.The input waveform is produced by a precision pulse generator under software control. Time delays aremeasured by a time interval counter (20 ps resolution ) connected to the output. The DS1033 output tapsare selected and connected to the interval counter by a VHF switch control unit. All measurements arefully automated with each instrument controlled by the computer over an IEEE 488 bus.
DS1033 TEST CIRCUIT Figure 2
DS1033
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature
Short Circuit Output Current
-1.0V to +6.0V0°C to 70°C-55°C to +125°C260°C for 10 seconds50 mA for 1 second
*This is a stress rating only and functional operation of the device at these or any other conditions abovethose indicated in the operation sections of this specification is not implied. Exposure to absolutemaximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
PARAMETERSupply VoltageActive Current
High Level Input VoltageLow Level Input VoltageInput Leakage
High Level Output CurrentLow Level Output Current
SYMBOLVCCICCVIHVILILIOHIOL
0V≤VI≤VCCVCC=2.7VVOH=2VVCC=2.7VVOL=0.4VVCC=3.6VPeriod=1μs
2.0-0.5-1.0
TESTCONDITION
MIN2.7
TYP3.3
(TA =0°C to 70°C)
MAX3.625VCC+0.50.81.0-1.0
8
UNITSVmAVVμAmAmA
AC ELECTRICAL CHARACTERISTICS
PARAMETERPeriod
Input Pulse WidthInput-to-Tap Output DelayOutput Rise or Fall TimePower-up Time
SYMBOLtPERIODtWItPLH, tPHLtOR, tOFtPU
MIN2 (tWI)100% ofTap Delay
Table 12.03.0
2.53.5100
TYP
MAX
nsnsnsnsnsms
(TA =+25°C)
UNITS
NOTES22
34
CAPACITANCE
PARAMETERInput Capacitance
SYMBOLCIN
MIN
TYP
MAX10
pF
(TA =+25°C)
UNITS
NOTES
DS1033
TEST CONDITIONS
Ambient Temperature: 25°C ±=3°CSupply Voltage (VCC):3.3V ±=0.1VInput Pulse:
High: 3.0V ±=0.1VLow: 0.0V ±=0.1VSource Impedance: 50?=max.
Rise and Fall Time: 3.0 ns max. - Measured between 0.6V and 2.4V.Pulse Width: 500 nsPulse Period: 1 μs
Output Load Capacitance: 15 pFOutput: Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
Note: The above conditions are for test only and do not restrict the devices under other data sheetconditions.
TIMING DIAGRAM
NOTES:
1.All voltages are referenced to ground.
2.Pulse width and duty cycle specifications may be exceeded; however, accuracy will be application-sensitive with respect to de-coupling, layout, etc.3.VCC=3.3V ±=10%.4.VCC=2.7V.
MEMORY存储芯片DS1033Z-8+T中文规格书 - 图文
