A Reconfigurable Block Cryptographic Processor
Based on VLIW Architecture
LI Wei;ZENG Xiaoyang;NAN Longmei;CHEN Tao;DAI Zibin
【期刊名称】《中国通信》 【年(卷),期】2016(013)001
【摘要】An Efficient and flexible implementation of block ciphers is critical
to
achieve
information
security
processing.Existing
implementation methods such as GPP,FPGA and cryptographic application-specific ASIC provide the broad range of support.Howev er,these methods could not achieve a good tradeoff between high-speed
processing
and
flexibility.In
this
paper,we
present
a
reconfigurable VLIW processor architecture targeted at block cipher processing,analyze basic operations and storage characteristics,and propose the multi-cluster register-file structure for block ciphers.As for the same operation element of block ciphers,we adopt reconfig urable technology
for
multiple
cryptographic
processing
units
and
interconnection scheme.The proposed processor not only flexibly accomplishes the combination of multiple basic cryptographic operations,but also realizes dynamic configuration for cryptographic processing units.It has been implemented with 0.18μm CMOS technology,the test results show that the frequency can reach 350MHz,and power consumption is 420mw.Ten kinds of block and hash
A Reconfigurable Block Cryptographic Processor Based on VLIW Architecture
