Semiconductor memory device
申请(专利)号： EP19930118578
专利号： EP0598400A2 主分类号： G11C11/419 申请权利人： NEC
CORPORATION
公开国代码： EP 优先权国家： JP
摘 要：
A semiconductor memory device comprises a word lines (15), pairs of complementary data lines (17, 18), memory elements (MC11) respectively arranged at each intersection of the word lines and the pairs of complementary data lines, pairs of complementary signal lines (17s, 18s) each associated with a sense amplifiers (SA) and selectively connected to one of the pairs of complementary data lines via a pair of transfer gate transistors (7, 8), first precharge means (5, 6) for charging the pairs of complementary data lines and second precharge means (19, 20) for charging the pairs of
complementary signal lines. The second precharge means charge the pairs of complementary signal lines to a first voltage (VD), the first precharge means charge the pairs of complementary signal lines to a second voltage (VD - Vt) which is smaller than the first voltage by a
申请日： 1993-11-18 公开公告日： 1994-05-25
分类号： G11C11/419;
G11C7/00 发明设计人： SUDA, KEI,
C/O NEC
CORPORATION; FURUYA, NOBUO, C/O NEC
CORPORATION 申请国代码： EP
优先权： 19921118 JP
332507/92
摘 要 附 图：
threshold voltage (Vt) of the transfer gate transistors and the transfer gate
transistors have their gate electrodes supplied with the first voltage. The transfer gate transistors are N-channel type MOS transistors and the first and the second precharge means include N and P channel MOS type transistors respectively. 主权项：
A semiconductor memory device comprising:
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Semiconductor memory device
