Gate - gate drive circuit
申请(专利)号: JP19870171254
专利号: JPH0681025B2 主分类号: H03K17/06 申请权利人: NIPPON
ELECTRIC CO 公开国代码: JP 优先权国家: JP
摘 要:
PURPOSE:To shorten the turning-off time without reducing the output of an output transistor TR by adding a CMOS inverter circuit to a gate driving circuit and
providing a reverse current stopping TR for the purpose of preventing the electric charge stored in the gate of the output TR from flowing out even at the time of
setting the potential of an output terminal to a value higher than the supply voltage. CONSTITUTION:The trigger signal to operate a boosting circuit 2 is inputted to a trigger terminal 5 of the boosting circuit 2 simultaneously with setting of an input terminal 18 of first and second CMOS inverter circuits 13 and 17 to the low level. Since the gate of an output TR 1 is
charged together with the boosting circuit 2, the gate potential quickly rises, and the turning-on time of an output TR 16 is
shortened. When the gate potential of the output TR 1 exceeds the supply voltage (VDD) by harging, source-drain junctions of N- channel TRs 13 and 14 are reverse biased. Therefore, the gate potential of the output TR 1 is sufficiently higher than the supply voltage, and the turning-on
申请日: 1987-07-10 公开公告日: 1994-10-12
分类号: H03K17/06 发明设计人: TAMAGAWA AKIO 申请国代码: JP
优先权: 19870710 JP
17125487
摘 要 附 图:
resistance of the output TR 1 is
sufficiently reduced; and thus, the source output of a large current is obtained through an output terminal 6. 主权项:
【請求項1】ソース出力として用いられるNチャネルMOSトランジスタからなる出力トランジスタのゲートを駆動するゲート駆動回路において、トリガ入力に応じて昇圧動作を行い昇圧された電圧を前記出力トランジスタ
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