System Integrators Application Note for MIPI I3C? v1.0 and I3C BasicSM v1.0
App Note Version 1.8
8 December 2024
MIPI Board Approved 8 December 2024
Public Release Edition
Copyright ? 2024 MIPI Alliance, Inc.
System Integrators App Note for I3C v1.0 and I3C Basic v1.0 App Note Version 1.0
08-Dec-2024
NOTICE OF DISCLAIMER
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Special Note Concerning I3C and I3C Basic As described in the I3C Basic specification, certain parties have agreed to grant additional rights to I3C Basic implementers, beyond those rights granted under the MIPI Membership Agreement or MIPI Bylaws. Contribution to or other participation in the development of this App Note document does not create any implication that a party has agreed to grant any additional rights in connection with I3C Basic. Consistent with the statements above, nothing in or about this App Note document alters any party’s rights or obligations associated with I3C or I3C Basic. ii
Copyright ? 2024 MIPI Alliance, Inc.
Public Release Edition
App Note Version 1.0 08-Dec-2024
System Integrators App Note for I3C v1.0 and I3C Basic v1.0
Contents
Figures ............................................................................................................................... iv Release History ...................................................................................................................v 1 Introduction .................................................................................................................1
1.1 2.1 2.2 2.3
Scope ............................................................................................................................... 1 Definitions ....................................................................................................................... 2 Abbreviations ................................................................................................................... 2 Acronyms ......................................................................................................................... 2
2 Terminology .................................................................................................................2
3 References ....................................................................................................................2 4 Overview ......................................................................................................................3
4.1.1 Supported Topologies ................................................................................................... 3 4.1.2 Using Added Functionality ........................................................................................... 3
5 System Integration Guidelines ...................................................................................4
5.1 I3C Device Characteristics .............................................................................................. 5
7 5.1.1 Clock-to-Data Turnaround Time (tSCO) .........................................................................
5.1.2 Pad Capacitance ............................................................................................................ 7 5.1.3 Pad Drive Strength ....................................................................................................... 7 5.1.4 BCR Use ....................................................................................................................... 8
2
9 5.2 Legacy IC Device Characteristics ..................................................................................
5.2.1 Pad Capacitance .......................................................................................................... 10 5.2.2 Spike Filter ................................................................................................................. 11 5.2.3 SDA Drive Strength .................................................................................................... 11
2
12 5.2.4 IC Clock Stretch is Not Allowed in I3C ....................................................................
5.2.5 Legacy Virtual Register Use ....................................................................................... 12 5.3 Dynamic Address Assignment (DAA) ........................................................................... 13 5.4 Bus Topologies .............................................................................................................. 15 5.4.1 Trace/Medium ............................................................................................................ 16 5.4.2 Mixed Bus Considerations ......................................................................................... 17 5.4.3 Point to Point Optimizations ...................................................................................... 17 5.4.4 Hot-Join/Failsafe/Offline Capability .......................................................................... 17 5.5 Physical/Electrical/Testing Considerations (I3C CTS) .................................................. 20 5.6 Bus High Keeper ............................................................................................................ 21 5.7 Bridge Devices............................................................................................................... 22 5.7.1 Use of SETBRGTGT (Set Bridge Targets) ................................................................ 22 5.7.2 Use of ENTDAA to Provide the Bridged Targets ....................................................... 23
24 5.7.3 Bridged Devices and IBI ............................................................................................
Copyright ? 2024 MIPI Alliance, Inc.
Public Release Edition
iii
MIPI_I3C-Spec_v1-0p
