NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
See Figure 6 for an overview of the LPC17xx clock generation.
LPC17xxMAINOSCILLATORUSB PLLUSBCLOCKDIVIDERpllclkusbclk(48 MHz)USB BLOCKMAIN PLLUSB clock configUSB PLL enable(USBCLKCFG)CPUCLOCKDIVIDERCPU clock config(CCLKCFG)cclksystemclockselect(CLKSRCSEL)INTERNALRCOSCILLATORmain PLL enableARMCORTEX-M3ETHERNETBLOCKDMAGPIONVICWATCHDOGTIMERCCLK/832 kHzRTCOSCILLATORpclkWDTrtclk = 1HzPERIPHERALCLOCKGENERATORREAL-TIMECLOCKCCLK/6CCLK/4CCLK/2CCLKAPB peripherals002aad947Fig 6.LPC17xx clocking generation block diagram8.29.1.1Internal RC oscillator
The IRC may be used as the clock source for the WDT, and/or as the clock that drives the PLL and subsequently the CPU. The nominal IRC frequency is 4 MHz. The IRC is trimmed to 1 % accuracy over the entire voltage and temperature range.
Upon power-up or any chip reset, the LPC17xx use the IRC as the clock source. Software may later switch to one of the other available clock sources.
8.29.1.2Main oscillator
The main oscillator can be used as the clock source for the CPU, with or without using the PLL. The main oscillator also provides the clock source for the dedicated USB PLL. The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted to a higher frequency, up to the maximum CPU operating frequency, by the main PLL. The clock selected as the PLL input is PLLCLKIN. The Arm processor clock frequency is referred to as CCLK elsewhere in this document. The frequencies of
PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The clock frequency for each peripheral can be selected individually and is referred to as PCLK. Refer to Section 8.29.2 for additional information.
8.29.1.3RTC oscillator
The RTC oscillator can be used as the clock source for the RTC block, the main PLL, and/or the CPU.
LPC1769_68_67_66_65_64_63All information provided in this document is subject to legal disclaimers.? NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheetRev. 9.10 — 8 September 2020 37 of 93
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
8.29.2Main PLL (PLL0)
The PLL0 accepts an input clock frequency in the range of 32 kHz to 25 MHz. The input frequency is multiplied up to a high frequency, then divided down to provide the actual clock used by the CPU and/or the USB block.
The PLL0 input, in the range of 32 kHz to 25 MHz, may initially be divided down by a value ‘N’, which may be in the range of 1 to 256. This input division provides a wide range of output frequencies from the same input frequency.
Following the PLL0 input divider is the PLL0 multiplier. This can multiply the input divider output through the use of a Current Controlled Oscillator (CCO) by a value ‘M’, in the range of 1 through 32768. The resulting frequency must be in the range of 275 MHz to 550 MHz. The multiplier works by dividing the CCO output by the value of M, then using a phase-frequency detector to compare the divided CCO output to the multiplier input. The error value is used to adjust the CCO frequency.
The PLL0 is turned off and bypassed following a chip Reset and by entering Power-down mode. PLL0 is enabled by software only. The program must configure and activate the PLL0, wait for the PLL0 to lock, and then connect to the PLL0 as a clock source.
8.29.3USB PLL (PLL1)
The LPC17xx contain a second, dedicated USB PLL1 to provide clocking for the USB interface.
The PLL1 receives its clock input from the main oscillator only and provides a fixed
48 MHz clock to the USB block only. The PLL1 is disabled and powered off on reset. If the PLL1 is left disabled, the USB clock will be supplied by the 48 MHz clock from the main PLL0.
The PLL1 accepts an input clock frequency in the range of 10 MHz to 25 MHz only. The input frequency is multiplied up the range of 48 MHz for the USB clock using a Current Controlled Oscillators (CCO). It is insured that the PLL1 output has a 50 % duty cycle.
8.29.4RTC clock output
The LPC17xx feature a clock output function intended for synchronizing with external devices and for use during system development to allow checking the internal clocks CCLK, IRC clock, main crystal, RTC clock, and USB clock in the outside world. The RTC clock output allows tuning the RTC frequency without probing the pin, which would distort the results.
8.29.5Wake-up timer
The LPC17xx begin operation at power-up and when awakened from Power-down mode by using the 4 MHz IRC oscillator as the clock source. This allows chip operation to
resume quickly. If the main oscillator or the PLL is needed by the application, software will need to enable these features and wait for them to stabilize before they are used as a clock source.
When the main oscillator is initially activated, the wake-up timer allows software to ensure that the main oscillator is fully functional before the processor uses it as a clock source and starts to execute instructions. This is important at power on, all types of Reset, and
LPC1769_68_67_66_65_64_63All information provided in this document is subject to legal disclaimers.? NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheetRev. 9.10 — 8 September 2020 38 of 93
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