MATRIX MULTIPLICATION ON A SYSTOLIC ARRAY
申请(专利)号： US201916576144
专利号： US2020012706A1 主分类号： G06F17/16 申请权利人： INTERNATIONAL
BUSINESS MACHINES
CORPORATION
公开国代码： US 优先权国家： US
摘 要：
Techniques facilitating matrix
multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a
processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing
申请日： 2019-09-19 公开公告日： 2020-01-09
分类号： G06F17/16
发明设计人： CHIA-YU CHEN;
JUNGWOOK CHOI; KAILASH
GOPALAKRISHNAN; VICTOR HAN; VIJAYALAKSHMI SRINIVASAN; JINTAO ZHANG 申请国代码： US
优先权： 20190919 US
201916576144; 20190411 US 201916381530; 20171214 US 201715842422; 20170316 US 201715460755
摘 要 附 图：
element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element. 主权项：
1. A system, comprising:
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MATRIX MULTIPLICATION ON A SYSTOLIC ARRAY
