VC707 Evaluation Board Features
Overview
The VC707 evaluation board for the Virtex?-7FPGA provides a hardware environment for developing and evaluating designs targeting the Virtex-7 XC7VX485T-2FFG1761C FPGA. The VC707 board provides features common to many embedded processing systems, including a DDR3 SODIMM memory, an 8-lane PCI Express? interface, a tri-mode Ethernet PHY, general purpose I/O, and two UART interfaces. Other features can be added by using mezzanine cards attached to either of two VITA-57 FPGA mezzanine connectors (FMC) provided on the board. Two high pin count (HPC) FMCs are provided. See VC707 Board Features for a complete list of features. The details for each feature are described in Feature Descriptions.
Additional Information
See AppendixG, Additional Resources for references to documents, files and resources relevant to the VC707 board.
VC707 Board Features
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Virtex-7 XC7VX485T-2FFG1761C FPGA1GB DDR3 memory SODIMM
128MB Linear byte peripheral interface (BPI) Flash memoryUSB 2.0 ULPI TransceiverSecure Digital (SD) connectorUSB JTAG through Digilent moduleClock Generation?????
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Fixed 200MHz LVDS oscillator (differential)I2C programmable LVDS oscillator (differential)SMA connectors (differential)
SMA connectors for GTX transceiver clockingFMC1 HPC connector (eight GTX transceivers)FMC2 HPC connector (eight GTX transceiver)
SMA connectors (one pair each for TX, RX, and REFCLK)PCI Express (eight lanes)
Small form-factor pluggable plus (SFP+) connectorEthernet PHY SGMII interface (RJ-45 connector)
GTX transceivers
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Chapter 1:VC707 Evaluation Board Features
?PCI Express endpoint connectivity??
Gen1 8-lane (x8)Gen2 8-lane (x8)
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SFP+ Connector
10/100/1000 tri-speed Ethernet PHYUSB-to-UART bridgeHDMI? codecI2C bus?????????
I2C MUX
I2C EEPROM (1KB)
USER I2C programmable LVDS oscillatorDDR3 SODIMM socketHDMI codecFMC1 HPC connectorFMC2 HPC connectorSFP+ connector
I2C programmable jitter-attenuating precision clock multiplierEthernet statusPower goodFPGA INITFPGA DONE
User LEDs (eight GPIO)
User pushbuttons (five directional)CPU reset pushbuttonUser DIP switch (8-pole GPIO)User SMA GPIO connectors (one pair)LCD character display (16 charactersx2 lines)Power on/off slide switchFPGA_PROB_B pushbuttonConfiguration mode DIP switch
?Status LEDs????
?User I/O??????
?Switches???
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VITA 57.1 FMC1 HPC ConnectorVITA 57.1 FMC2 HPC ConnectorPower management?
PMBus voltage and current monitoring through TI power controllerXADC headerConfiguration options?
Linear BPI Flash memory
VC707 Evaluation BoardUG885 (v1.8) February 20, 2019
Overview
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USB JTAG configuration port
Platform cable header JTAG configuration port
The VC707 board block diagram is shown in Figure 1-1. The VC707 board schematics are available for download from the VC707 Evaluation Kit product page on the Docs & Designs
Electrostatic Discharge Caution
Caution!ESD can damage electronic components when they are improperly handled, and can
result in total or intermittent failures. Always follow ESD-prevention procedures when removing and replacing components.
To prevent ESD damage:
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Use an ESD wrist or ankle strap and ensure that it makes skin contact. Connect theequipment end of the strap to an unpainted metal surface on the chassis.
Avoid touching the adapter against your clothing. The wrist strap protects componentsfrom ESD on the body only.
Handle the adapter by its bracket or edges only. Avoid touching the printed circuit boardor the connectors.
Put the adapter down only on an antistatic surface such as the bag supplied in your kit.If you are returning the adapter to Xilinx Product Support, place it back in its antistatic bagimmediately.
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Chapter 1:VC707 Evaluation Board Features
X-Ref Target - Figure 1-11 GB DDR3 Memory(SODIMM)FMC Connectors(HPC/HPC)10/100/1000 EthernetInterfaceDifferential ClockGTX SMA ClockXADC HeaderUser Switches,Buttons, and LEDsHDMI VideoInterfaceVirtex-7 FPGAXC7VX485T-2FFG1761C128 MB Linear BPIFlash memoryUSB 2.0ULPI PHY8-lane PCI ExpressEdge ConnectorLCD Display(2 line x 16 characters)1 KB EEPROM (I2C)I2C Bus SwitchDIP Switch SW11Config and Flash AddrUSB-to-UART BridgeJTAG Interfacemini-B USB ConnectorSFP+ Single CageUG885_c1_01_030512Figure 1-1:VC707 Board Block Diagram
VC707 Evaluation BoardUG885 (v1.8) February 20, 2019
Feature Descriptions
Feature Descriptions
Figure1-2 shows the VC707 board. Each numbered feature that is referenced in Figure1-2 is described in the sections that follow.
Note:The image in Figure1-2 is for reference only and might not reflect the current revision of the
board.
X-Ref Target - Figure 1-200Round callout references a componenton the front side of the board3000Square callout references a componenton the back side of the board31222711363314265243781761020127211535129323228342918191634132523User rotary switchlocated under LCDUG885_c1_02_082114Figure 1-2:
Table 1-1:
Callout
VC707 Board Component Locations
VC707 Board Component Descriptions
Reference DesignatorU1J1U3U8, J2U29U26U51
Component Description
Notes
Schematic 0381418 Page Number
1234567
Virtex-7 FPGA with cooling fanDDR3 SODIMM memory (1GB)BPI parallel NOR flash memory (1Gb)USB ULPI transceiver, USB mini-B connectorSD card interface connector
USB JTAG interface, USB micro-B connectorSystem clock, 200MHz, LVDS (back side of board)
XC7VX485T-2FFG1761CMicron MT8JTF12864HZ-1G6G1Micron PC28F00AG18FESMSC USB3320-EZKMolex 67840-8001Digilent USB JTAG moduleSiTime SIT9102-243N25E200.0000
213544372032
VC707 Evaluation Board
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FPGA可编程逻辑器件芯片XQ17V16CC44M中文规格书 - 图文
