Data Sheet TERMINOLOGY
VDD
Most positive power supply potential. VSS
Most negative power supply potential. IDD
Positive supply current. ISS
Negative supply current. GND
Ground (0 V) reference.
S
Source terminal. Can be an input or output. D
Drain terminal. Can be an input or output. AX
Logic control input.
EN
Active low digital input. When EN is high, the device is disabled and all switches are off. When EN is low, the Ax logic inputs determine the on switches.
VD, VS
Analog voltage on Terminal D and Terminal S. RON
Ohmic resistance between Terminal D and Terminal S. ΔRON
On-resistance match between any two channels, that is, RONMAX ? RONMIN.
RFLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range.
IS(OFF)
Source leakage current with the switch off. ID(OFF)
Drain leakage current with the switch off. ID(ON), IS(ON)
Channel leakage current with the switch on. VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1. IINL, IINH
Input current of the digital input.
ADG633
CS(OFF)
Off switch source capacitance. Measured with reference to ground.
CD(OFF)
Off switch drain capacitance. Measured with reference to ground.
CD(ON), CS(ON)
On switch capacitance. Measured with reference to ground. CIN
Digital input capacitance.
tON (EN)
Delay between applying the digital control input and the output switching on (see Figure 26).
tOFF (EN)
Delay between applying the digital control input and the output switching off (see Figure 26).
tBBM
On time, measured between 80% points of both switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch. Crosstalk
A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Bandwidth
The frequency at which the output is attenuated by 3 dB. On Response
The frequency response of the on switch. Insertion Loss
The loss due to the on resistance of the switch.
Rev. B | Page 11 of 16
ADG633 TEST CIRCUITS
IDSV1Data Sheet
SDNC03275-020SDID(ON)A03275-022VSRON = V1/IDSNC = NO CONNECTVDFigure 20. On Resistance Figure 22. Drain Off Leakage
VDDVDDIS(OFF)AVSID(OFF)A03275-021VSSVSSID(ON)AVD03275-023S1AS1BVSENGNDSDDVDFigure 21. Source Off Leakage Figure 23. Channel On Leakage
VDD0.1μFVDDA2VIN50?A1A0VSS0.1μFVSSS1AS1BVS1AVS1B3VADDRESSDRIVE (VIN)0V90%VOUT90%DGNDRL300?CL35pFVOUT03275-02403275-02550P-G633ENtTRANSITIONtTRANSITIONFigure 24. Transition Time, tTRANSITION
VDD0.1μFVDDA2VIN50?A1A0VSS0.1μF3VVSSS1AS1BVSADDRESSDRIVE (VIN)0VADG633ENGNDD1RL300?CL35pFVOUTVOUT80?%tBBMFigure 25. Break-Before-Make Delay, tBBM
Rev. B | Page 12 of 16
半导体传感器ADG1412YRUZ中文规格书 - 图文
