AppendixC
8B/10B Valid Characters
8B/10B encoding includes a set of Data characters and K characters. Eight-bit values are coded into 10-bit values, keeping the serial line DC balanced. K characters are special Data characters designated with a CHARISK. K characters are used for specific informative designations. TableC-1 shows the valid Data characters. TableC-2, page341 shows the valid K characters.Table C-1:
Valid Data Characters
Bits HGF EDCBA000000000000000100000010000000110000010000000101000001100000011100001000000010010000101000001011000011000000110100001110000011110001000000010001000100100001001100010100
Current RD –abcdei fghj100111010001110101001011010100110001101111010101001010011011011001101111100010111110010100100101101101010110111101001011001101101110110010110111001011010111010001101101001000111011010011101111001010110010111011
Current RD + abcdei fghj011000101110001010110100101011110001010000101010111010010100011001010000011101000001101011100101010001010101001101000100001101010010110001000111000100101000101110010010111000110100010011010011001001000010110100
Data Byte NameD0.0D1.0D2.0D3.0D4.0D5.0D6.0D7.0D8.0D9.0D10.0D11.0D12.0D13.0D14.0D15.0D16.0D17.0D18.0D19.0D20.0
RocketIO GTX Transceiver User GuideUG198 (v3.0) October 30, 2009
Appendix C:8B/10B Valid Characters
Table C-1:Valid Data Characters (Cont’d)
Bits HGF EDCBA0001010100010110000101110001100000011001000110100001101100011100000111010001111000011111001000000010000100100010001000110010010000100101001001100010011100101000001010010010101000101011001011000010110100101110001011110011000000110001001100100011001100110100
Current RD –abcdei fghj10101010110110101011111010010011001101001001101011010110101111011001000011101011101110010001111001001010110100100111100101110110011011011001110001100111010110011010011001011001100111100010011110011001100101100101010110011101001001001101100110110010010111001001010111100101101110011000111001010011100111001010010010111001
Current RD + abcdei fghj10101001000110100100000101101100110010111001100100010110010000100110110011100100010001101110000110110101001011011000100110001010010100101001110001100100101010011010011001011001100100011110010001101001100101100101010110011101001001001101100110110010010111001001101000100110010010011000111001010011100111001010010010111001
Data Byte NameD21.0D22.0D23.0D24.0D25.0D26.0D27.0D28.0D29.0D30.0D31.0D0.1D1.1D2.1D3.1D4.1D5.1D6.1D7.1D8.1D9.1 D10.1D11.1D12.1D13.1D14.1D15.1D16.1D17.1D18.1D19.1D20.1
RocketIO GTX Transceiver User Guide
UG198 (v3.0) October 30, 2009
Appendix C:8B/10B Valid Characters
RocketIO GTX Transceiver User Guide
UG198 (v3.0) October 30, 2009
Appendix D:DRP Address Map of the GTX_DUAL Tile
RocketIO GTX Transceiver User Guide
UG198 (v3.0) October 30, 2009
Appendix D:DRP Address Map of the GTX_DUAL Tile
Table D-5:
Bit
DRP Addresses 0x08 through 0x0F
Address
0x08
0x09PCI_EXPRESS_MODE_1
0x0APLL_RXDIVSEL_OUT_1[0]PMA_CDR_SCAN_1[26]
0x0BPMA_CDR_SCAN_1[11]PMA_CDR_SCAN_1[10]PMA_CDR_SCAN_1[9]PMA_CDR_SCAN_1[8]PMA_CDR_SCAN_1[7]PMA_CDR_SCAN_1[6]PMA_CDR_SCAN_1[5]PMA_CDR_SCAN_1[4]PMA_CDR_SCAN_1[3]PMA_CDR_SCAN_1[2]PMA_CDR_SCAN_1[1]PMA_CDR_SCAN_1[0]
0x0C
0x0D
0x0ERX_LOS_INVALID_INCR_1[0]
0x0FSATA_MAX_BURST_1[3]SATA_MAX_BURST_1[2]SATA_MAX_BURST_1[1]SATA_MAX_BURST_1[0]
0
CHAN_BOND_SEQ_2_4_1[4]
PRBS_ERR_PRBS_ERR_THRESHOLD_THRESHOLD_
1[27]1[11]
1
CHAN_BONDPCOMMA_10B_
_SEQ_2_4_1[5]VALUE_1[9]
PRBS_ERR_PRBS_ERR_
RX_LOSS_OF_
THRESHOLD_THRESHOLD_
SYNC_FSM_1
1[26]1[10]PRBS_ERR_PRBS_ERR_RX_LOS_THRESHOLD_THRESHOLD_THRESHOLD_
1[25]1[9]1[2]PRBS_ERR_PRBS_ERR_RX_LOS_THRESHOLD_THRESHOLD_THRESHOLD_
1[24]1[8]1[1]
2
CHAN_BONDPCOMMA_10B_PMA_CDR_S
_SEQ_2_4_1[6]VALUE_1[8]CAN_1[25]CHAN_BONDPCOMMA_10B_PMA_CDR_S_SEQ_2_4_1[7]VALUE_1[7]CAN_1[24]CHAN_BONDPCOMMA_10B_PMA_CDR_S_SEQ_2_4_1[8]VALUE_1[6]CAN_1[23]CHAN_BONDPCOMMA_10B__SEQ_2_4_1[9]VALUE_1[5]CHAN_BONDPCOMMA_10B__SEQ_2_3_1[0]VALUE_1[4]CHAN_BONDPCOMMA_10B__SEQ_2_3_1[1]VALUE_1[3]CHAN_BONDPCOMMA_10B__SEQ_2_3_1[2]VALUE_1[2]CHAN_BONDPCOMMA_10B__SEQ_2_3_1[3]VALUE_1[1]CHAN_BONDPCOMMA_10B__SEQ_2_3_1[4]VALUE_1[0]CHAN_BOND_SEQ_2_3_1[5]CHAN_BOND_SEQ_2_3_1[6]CHAN_BOND_SEQ_2_3_1[7]CHAN_BOND_SEQ_2_3_1[8]
Do Not Modify
PCOMMA_DETECT_1
PMA_CDR_SCAN_1[22]PMA_CDR_SCAN_1[21]PMA_CDR_SCAN_1[20]PMA_CDR_SCAN_1[19]PMA_CDR_SCAN_1[18]PMA_CDR_SCAN_1[17]PMA_CDR_SCAN_1[16]PMA_CDR_SCAN_1[15]PMA_CDR_SCAN_1[14]PMA_CDR_SCAN_1[13]PMA_CDR_SCAN_1[12]
3
4
PRBS_ERR_PRBS_ERR_RX_LOS_
SATA_MAX_I
THRESHOLD_THRESHOLD_THRESHOLD_
NIT_1[5]
1[23]1[7]1[0]PRBS_ERR_PRBS_ERR_THRESHOLD_THRESHOLD_
1[22]1[6]PRBS_ERR_PRBS_ERR_THRESHOLD_THRESHOLD_
1[21]1[5]PRBS_ERR_|TPRBS_ERR_HRESHOLD_1THRESHOLD_
[20]1[4]
RX_SLIDE_
MODE_1RX_STATUS_FMT_1RX_XCLK_SEL_1
SATA_MAX_INIT_1[4]SATA_MAX_INIT_1[3]SATA_MAX_INIT_1[2]
5
6
7
8
PRBS_ERR_PRBS_ERR_
SATA_BURST_SATA_MAX_I
THRESHOLD_THRESHOLD_
VAL_1[2]NIT_1[1]
1[19]1[3]PRBS_ERR_PRBS_ERR_
SATA_BURST_SATA_MAX_I
THRESHOLD_THRESHOLD_
VAL_1[1]NIT_1[0]
1[18]1[2]PRBS_ERR_PRBS_ERR_
SATA_BURST_
THRESHOLD_THRESHOLD_
VAL_1[0]
1[17]1[1]PRBS_ERR_PRBS_ERR_THRESHOLD_THRESHOLD_
1[16]1[0]
SATA_IDLE_
VAL_1[2]SATA_IDLE_VAL_1[1]SATA_IDLE_VAL_1[0]SATA_MAX_BURST_1[5]SATA_MAX_BURST_1[4]
SATA_MAX_WAKE_1[5]SATA_MAX_WAKE_1[4]SATA_MAX_WAKE_1[3]SATA_MAX_WAKE_1[2]SATA_MAX_WAKE_1[1]SATA_MAX_WAKE_1[0]
9
10
11
12CLKRCV_TRST
PRBS_ERR_PRBS_ERR_
RX_BUFFER_U
THRESHOLD_THRESHOLD_
SE_1
1[31]1[15]PRBS_ERR_PRBS_ERR_RX_DECODE_THRESHOLD_THRESHOLD_SEQ_MATCH_
1[30]1[14]1PRBS_ERR_PRBS_ERR_RX_LOS_INVATHRESHOLD_THRESHOLD_LID_INCR_1[2
1[29]1[13]]PRBS_ERR_PRBS_ERR_RX_LOS_INVATHRESHOLD_THRESHOLD_LID_INCR_1[1
1[28]1[12]]
13
Do Not
Modify
14PLL_SATA_1
15
PLL_RXDIVSEL_OUT_1[1]
RocketIO GTX Transceiver User Guide
UG198 (v3.0) October 30, 2009
FPGA可编程逻辑器件芯片XC2S15-5FGG456I中文规格书 - 图文
