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FPGA可编程逻辑器件芯片XC2VP30-3FF896I中文规格书

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Chapter6

Readback and Configuration Verification

Spartan?-6 devices allow users to read configuration memory through the SelectMAP, ICAP, and JTAG interfaces. During readback, the user reads all configuration memory cells, including the current values on all user memory elements (LUT RAM, SRL16, and block RAM).

To read configuration memory, users must send a sequence of commands to the device to initiate the readback procedure. Once initiated, the device dumps the contents of its

configuration memory to the SelectMAP or JTAG interface. The Accessing Configuration Registers through the SelectMAP Interface section and IEEE Std 1149.1 JTAG describe the steps for reading configuration memory.

Users can send the readback command sequence from a custom microprocessor, CPLD, or FPGA-based system, or use iMPACT to perform JTAG-based readback verify. iMPACT, the device programming software provided with the ISE? software by Xilinx, can perform all readback and comparison functions for Spartan-6 devices and report to the user whether there were any configuration errors.

Once configuration memory is read from the device, the next step is to determine if there are any errors by comparing the readback bitstream to the configuration bitstream. The Verifying Readback Data section explains how this is done.

Preparing a Design for Readback

There are two mandatory bitstream settings for readback using JTAG or SelectMAP: the BitGen security setting must not prohibit readback (-g Security:none), and bitstream encryption must not be used. Additionally, if readback is to be performed through the SelectMAP interface, the port must be set to retain its function after configuration by

setting the persist option in BitGen (-g Persist:Yes), otherwise the SelectMAP data pins revert to user I/O, precluding further configuration operations. Beyond these security and encryption requirements, no special considerations are necessary to enable readback through the boundary-scan port. Also, these requirements are not necessary when using readback via the ICAP. Limitations for readback are:?

Performing a readback while the design is in operation (without providing ashutdown command) results in reading back invalid blockRAM data. The actualcontents of the blockRAM are unaffected.

Performing a readback (with or without a shutdown command) corrupts the contentsof blockRAMs configured in 9K mode.

?

Spartan-6 FPGA Configuration User GuideUG380 (v2.11) March 22, 2019

Verifying Readback Data

Verifying Readback Data

The readback data stream contains configuration frame data that are preceded by one frame of pad data, as described in the Configuration Memory Read Procedure

(SelectMAP). The readback stream does not contain any of the commands or packet information found in the configuration bitstream and no CRC calculation is performed during readback. The readback data stream is shown in Figure6-3.

X-Ref Target - Figure 6-3Readback Data1 FramePad Frame(65 16-Bit Words)Type 0 - CLB Frame DataTotalNumber ofDeviceFramesPad Frame(65 16-Bit Words)Type 1 - Block RAM Frame DataPad Frame(1 16-Bit Word)Type 2 - IOB Frame DataUG380_c6_03_062911Figure 6-3:Readback Data Stream

The readback data stream is verified by comparing it to the original configuration frame data that were programmed into the device. Certain bits within the readback data stream must not be compared, because these can correspond to user memory or null memory locations. The location of don't care bits in the readback data stream is given by the mask files (MSK andMSD). These files have different formats although both convey essentially the same information. Once readback data have been obtained from the device, either of the following comparison procedures can be used:1.

Compare readback data to the RBD golden readback file. Mask by using the MSD file (see Figure6-4).

The simplest way to verify the readback data stream is to compare it to the RBD goldenreadback file, masking readback bits with the MSD file. This approach is simple because there is a 1:1 correspondence between the start of the readback data stream and thestart of the RBD and MSD files, making the task of aligning readback, mask, andexpected data easier.

Spartan-6 FPGA Configuration User GuideUG380 (v2.11) March 22, 2019

Chapter 6:Readback and Configuration Verification

The RBD and MSD files contain an ASCII representation of the readback and mask data along with a file header that lists the file name, etc. This header information should be ignored or deleted. The ASCII 1s and 0s in the RBD and MSD files correspond to the binary readback data from the device. Take care to interpret these files as text, not binary sources. Users can convert the RBD and MSD files to a binary format using a script or text editor, to simplify the verify procedure for some systems and to reduce the size of the files by a factor of eight.

X-Ref Target - Figure 6-4MSDFileReadbackData Stream1 FramePad FrameFile HeaderPad FrameRBDFileFile HeaderPad FrameTotalNumber ofDeviceFramesFrame DataFrame DataMaskFrame DataUG380_c6_04_042909Figure 6-4:Comparing Readback Data Using the MSD and RBD Files

The drawback to this approach is that in addition to storing the initial configuration bitstream and the MSD file, the golden RBD file must be stored somewhere, increasing the overall storage requirement. 2.

Compare readback data to the configuration BIT file, mask using the MSK file (seeFigure6-5).

Another approach for verifying readback data is to compare the readback data streamto the frame data within the FDRI write in the original configuration bitstream,masking readback bits with the MSK file.

After sending readback commands to the device, comparison begins by aligning thebeginning of the readback frame data to the beginning of the FDRI write in the BITand MSK files. The comparison ends when the end of the FDRI write is reached.This approach requires the least in-system storage space, because only the BIT, MSK,and readback commands must be stored.

Spartan-6 FPGA Configuration User Guide

UG380 (v2.11) March 22, 2019

FPGA可编程逻辑器件芯片XC2VP30-3FF896I中文规格书

Chapter6ReadbackandConfigurationVerificationSpartan?-6devicesallowuserstoreadconfigurationmemorythroughtheSelectMAP,ICAP,andJTAGinterfaces.Duringreadback,theuser
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