III. 综合题（10 points each）
1 01111 largest positive101010 0 10001 numbers representable in 011011 1. What are the and the smallest positivethis format?Note: Using rounding as the truncation method in the answers. Write the computation process!Solution:
2. A logic circuit is needed to implement the priority network shown like figure 2. The network handles three interrupt request lines. When a request is received on line INTRi, the network generates an acknowledgement on line INTAi. If more than one request is received, only the highest-priority request is acknowledged, where the ordering of priority is: priority of INTR1 > priority of INTR2 > priority of INTR3.
Figure 1 Floating-point format used in Problem 1. 1 bit for sign of number 0 signifies ＋ 1 signifies － 5 bits excess-15 exponent 6 bits fractional mantissa 12bits 《 计算机组成与体系结构 》试卷 第 6 页 共 10 页
INTR1Processo DeviceINTA1 Device
INTRpINTpPriority arbitration
circuit
DeviceDevice(1) Give a truth table for each of the outputs INTA1, INTA2, and INTA3.
(2) Give logic expressions of INTA1, INTA2, INTA3 and a logic circuit for implementing this priority network. Solution:
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3. Assume that a computer’s word-length is 16-bit, the capacity of main memory is 64K words. If it employs single-word-length one-address instructions and contains 64 instructions. Design an instruction format with addressing modes of direct, indirect, index, and relative. Solution:
4. The following figure 3 gives part of the microinstruction sequence corresponding to one of the machine instructions of a microprogrammed computer. Microinstruction B is followed by C, E, F, or I, depending on bits b6 and b5 of the machine instruction register. Compare the two possible implementations described below.
A 《 计算机组成与体系结构 》试卷B 第 8 页 共 10 页
b6b5=00
b6b5=01 b6b5=10 b6b5=11 C E F I
(1) Microinstruction sequencing is accomplished by means of a microprogram counter. Branching is achieved by microinstructions of the form: If b6b5 branch to X, where b6b5 is the branch condition and X is the branch address.
(2) Same as (1) except that the branch microinstruction has the form: Branch to X, OR Where X is a base branch address. The branch address is modified by bit-ORing of bits b5 and b6 with the appropriate bits with X. Solution:
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5. （10 points）Consider the following piece of code: int x = 0, y = 0;//The compiler puts x in R1 and y in R2. int i;//The compiler puts i in R3. int A[4096];//A is in memory. …
for (i = 0; i < 1024; i ++) { x +=A[i]; }
for (i = 0; i < 1024; i ++) { y +=A[i + 2048]; }
Assume that the system has a 8192-byte, direct-mapped data cache with 16-byte blocks. Solution:
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2010计算机组成与体系结构A卷
