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华南理工大学期末考试
《 计算机组成与体系结构 》试卷A
注意事项：1. 考前请将密封线内填写清楚； 2. 所有答案请直接答在试卷上； 3．考试形式：闭卷；
4. 本试卷共 三 大题，满分100分， 考试时间120分钟。 题 号 一 得 分 评卷人 二 三 四 五 总分 I. 单选题（2 points each）
For each question in this section, choose 1 answer. Choose the best answer. 1. A 2’s-complement overflow cannot occur when . A. two positive numbers are added B. two negative numbers are added
C. a positive number is added to a negative number
_____________ ________ D. a positive number is subtracted from a negative number 2. What is the effect of the following instruction? . move ecx, [ebp+8] A. Add 8 to the contents of ebp and store the sum in ecx.
B. Add 8 to the contents of ebp, treat the sum as a memory address and store the contents at that address in ecx.
C. Add 8 to the contents of the memory location whose address is stored in ebp and store the sum in ecx.
D. Add the contents of ebp to the contents of memory address 8 and store the sum in ecx.
Answer the question 3-4 based on the following information: A memory system uses 24-bit physical address. It has a direct-mapped cache with 64 entries. The block size is 4 words (word size is 4 bytes). Each cache entry has a “valid bit”, a “tag field”, and space for data.
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姓名 学号 3. The number of bits reserved for the tag field is . A. 14
B. 10
C. 6
D. 12
4. The total number of bits in the cache is . A. 26*(143)
B. 26*(33)
C. 28*(145)
D. 214*(33)
5. As part of handling interrupts, the processor must inform the device that its request has been recognized. This may be accomplished by means of a special control signal: signal. A. interrupt-enable C. interrupt-request
B. interrupt-acknowledge D. interrupt-service
6. In IEEE 754 double-precision floating point number standard, instead of the signed exponent, E, the value actually stored in the exponent field is an unsigned integer . A. E’=E+127
B. E’=E+128
C. E’=E+1023
D. E’=E+1024
7. The microroutines for all instructions in the instruction set of a computer are stored in a special memory called the . A. flash memory
B. control store
C. μPC
D. SRAM
8. In DMA transfers, the data transfer unit between main memory and I/O devices is . A. byte
B. word
C. block of data
D. bit
9. arise from resource conflicts when the hardware cannot support all possible combinations of instructions simultaneously in overlapped execution. A. Structural hazards C. Control hazards
B. Data hazards D. Branch hazards
10. In microprogram-controlled machines, the relationship between the machine instruction and the microinstruction is . A. a machine instruction is executed by a microinstruction B. a microinstruciton is composed of several machine instructions
C. a machine instruction is interpreted by a microroutine composed of microinstructions
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D. a microroutine is executed by a machine instruction
11. In memory-mapped I/O system, we use to differentiate memory locations and I/O devices. A. different addresses C. different instructions
B. different address buses D. different control signals
12. A major advantage of direct mapping of a cache is its simplicity. The main disadvantage of this organization is that . A. It’s more expensive than other types of cache organization. B. Its access time is greater than that of other cache organizations.
C. The cache hit ratio is degraded if two or more blocks used alternatively mapped onto the same block frame in the cache.
D. It does not allow simultaneously access to the intended data and its tag.
13. Assume that the multiplicand is 110011 and the multiplier is 101100. If multiply them using the Booth algorithm, then the Booth recoding multiplier is . A. – 1 + 1 0 – 1 1 0 C. – 1 + 1 0 – 1 0 0
B. – 1 – 1 0 – 1 0 0 D. + 1 + 1 0 – 1 0 0
14. If the 2006 version of a computer executes a program in 200s and the version of the computer made in the year 2007 executes the same program in 150s, then the speedup that the manufacturer has achieved over the two-year period is . A. 1.44
B. 1.78
C. 1.63
D. 1.33
15. Assume that a Branch instruction uses relative addressing mode. It is two bytes in length. The first byte contains opcode, and the second contains offset (2’s-complement representation). Assume that when the processor fetches the first byte of Branch instruction, PC points to the next instruction automatically. At first (PC) = 2008H (before fetching the Brach instruction), if the program wants to jump to the address of 2001H, then the content of the second byte of this Branch instruction is . A. 07H
B. F7H
C. 09H
D. F9H
II. 简答题 (5 points each)
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1. What is the difference between a subroutine and an interrupt-service routine? Solution:
2. What are the advantages and disadvantages of hardwired and microprogrammed
control? Solution:
3. Explain the drawback of the ripple carry full adder when you need to design 64-bit CPU core. And give a solution for the drawback. (Just give a name of the
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circuit. You don’t need to draw a circuit of solution). Solution:
4. A system has 48-bit virtual addresses and 36-bit physical addresses. If the system
uses 4096-byte pages, how many virtual and physical pages can the address space support? Solution:
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2010计算机组成与体系结构A卷
