FEATURESExcellent Video PerformanceDifferential Gain and Phase Error of 0.01% and 0.05?High Speed130 MHz 3 dB Bandwidth (G = +2)450 V/?s Slew Rate80 ns Settling Time to 0.01%Low Power15 mA Max Power Supply CurrentHigh Output Drive Capability50 mA Minimum Output Current per AmplifierIdeal for Driving Back Terminated CablesFlexible Power SupplySpecified for +5 V, ?5 V, and ?15 V Operation?3.2 V Min Output Swing into a 150 ? Load(VS = ?5 V)Excellent DC Performance2.0 mV Input Offset VoltageAvailable in 8-Lead SOIC and 8-Lead Plastic Mini-DIPGENERAL DESCRIPTIONThe AD828 is a low cost, dual video op amp optimized for usein video applications that require gains of +2 or greater andhigh output drive capability, such as cable driving. Due to itslow power and single-supply functionality, along with excellentdifferential gain and phase errors, the AD828 is ideal for power-sensitive applications such as video cameras and professionalvideo equipment.With video specs like 0.1 dB flatness to 40 MHz and lowdifferential gain and phase errors of 0.01% and 0.05°, alongwith 50 mA of output current per amplifier, the AD828 is anexcellent choice for any video application. The 130 MHz gainbandwidth and 450 V/μs slew rate make the AD828 useful inmany high speed applications, including video monitors, CATV,color copiers, image scanners, and fax machines.+V0.1?FVIN RR 75BT?75?75T?AD8281/2R0.175T?F?–V1k? 1k?Figure 1. Video Line DriverAD828FUNCTIONAL BLOCK DIAGRAMOUT118V+–IN127OUT2+IN136–IN2V–4AD8285+IN2The AD828 is fully specified for operation with a single 5 Vpower supply and with dual supplies from ±5 V to ±15 V. Thispower supply flexibility, coupled with a very low supply currentof 15 mA and excellent ac characteristics under all power supplyconditions, make the AD828 the ideal choice for many demand-ing yet power-sensitive applications.The AD828 is a voltage feedback op amp that excels as a gainstage (gains > +2) or active filter in high speed and video systemsand achieves a settling time of 45 ns to 0.1%, with a low inputoffset voltage of 2 mV max.The AD828 is available in low cost, small 8-lead plastic mini-DIPand SOIC packages.0.03tnecreP 0.02– NIADIFF GAING sLeAeIrTg0.070.01NeDER –E EFSFIA0.06DHP LADIFF PHASEITNE0.05REFFID0.0451015SUPPLY VOLTAGE – ?VFigure 2.Differential Phase vs. Supply VoltageAD828–SPECIFICATIONS(@ TA = 25?C, unless otherwise noted.)
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AD828
ParameterOUTPUT CHARACTERISTICSOutput Voltage SwingConditionsRLOAD = 500 ?RLOAD = 150 ?RLOAD = 1 k?RLOAD = 500 ?RLOAD = 500 ?VS±5 V±5 V±15 V±15 V0, +5 V±15 V±5 V0, +5 V±15 VMin3.33.213.312.81.53.5504030Typ3.83.613.713.4MaxUnit±V±V±V±V±VmAmAmAmA?Output CurrentShort Circuit CurrentOutput ResistanceMATCHING CHARACTERISTICSDynamicCrosstalkGain Flatness MatchSkew Rate MatchDCInput Offset Voltage MatchInput Bias Current MatchOpen-Loop Gain MatchCommon-Mode Rejection Ratio MatchPower Supply Rejection Ratio MatchPOWER SUPPLYOperating RangeQuiescent CurrentPower Supply Rejection Ratio*Full power bandwidth = slew rate/2 π VPEAK.Specifications subject to change without notice.Open-Loop908f = 5 MHzG = +1, f = 40 MHzG = –1TMIN to TMAXTMIN to TMAXVO = ±10 V, RL = 1 k?, TMIN to TMAXVCM = ±12 V, TMIN to TMAX±5 V to ±15 V, TMIN to TMAXDual SupplySingle SupplyTMIN to TMAXTMIN to TMAXVS = ±5 V to ±15 V, TMIN to TMAX±15 V±15 V±15 V±5 V, ±15 V±5 V, ±15 V±15 V±15 V–800.2100.50.060.0110010020.80.15dBdBV/μsmVμAmV/VdBdBVVmAmAmAdB8080±2.5+5±5 V±5 V±5 V14.014.08090±18+36151515ORDERING GUIDEModelTemperatureRangePackageDescription8-Lead Plastic DIP8-Lead Plastic SOIC7\13\TJ = 150?CMAXIMUM POWER DISSIPATION – WattsPackageOptionN-8SO-8SO-8SO-8ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 VInternal Power Dissipation2Plastic DIP (N) . . . . . . . . . . . . . . . . . .See Derating CurvesSmall Outline (R) . . . . . . . . . . . . . . . . .See Derating CurvesInput Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . .±VSDifferential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . .±6 VOutput Short Circuit Duration . . . . . . . .See Derating CurvesStorage Temperature Range (N, R) . . . . . . . .–65°C to +125°COperating Temperature Range . . . . . . . . . . . .–40°C to +85°CLead Temperature Range (Soldering 10 sec) . . . . . . . .+300°CNOTES1Stresses above those listed under Absolute Maximum Ratings may cause perma-nent damage to the device. This is a stress rating only; functional operation of thedevice at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum ratingconditions for extended periods may affect device reliability.2Specification is for device in free air:8-Lead Plastic DIP Package: θJA = 100°C/W8-Lead SOIC Package: θJA = 155°C/WAD828AN–40°C to +85°CAD828AR–40°C to +85°CAD828AR-REEL7–40°C to +85°CAD828AR-REEL–40°C to +85°C2.08-LEAD MINI-DIP PACKAGE1.51.00.58-LEAD SOIC PACKAGE0–50–40–30–20–10010203040506070AMBIENT TEMPERATURE – ?C8090CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readilyaccumulate on the human body and test equipment and can discharge without detection. Althoughthe AD828 features proprietary ESD protection circuitry, permanent damage may occur on devicessubjected to high energy electrostatic discharges. Therefore, proper ESD precautions arerecommended to avoid performance degradation or loss of functionality.Figure 3.Maximum Power Dissipation vs.Temperature for Different Package TypesWARNING!ESD SENSITIVE DEVICEREV. C
AD828
CF1k?1k?+VS1005V3.3?F 9050ns0.01?F2HP PULSE (LS)OR FUNCTION (SS)GENERATORRINVIN100?350?3.3?F–VS81/2AD8284VOUT10.01?FTEKTRONIXP6201 FETPROBERLTEKTRONIX7A24PREAMP 10 0%5VTPC 31. Noninverting Amplifier ConnectionTPC 34. Noninverting Large Signal Pulse Response?15 VS, CF = 1 pF, RL = 1 k?
1V100 9050ns100 90100mV10ns 10 0% 10 0%2V200mVTPC 32.Noninverting Large Signal Pulse Response?5 VS, CF = 1 pF, RL = 1 k?
TPC 35. Noninverting Small Signal Pulse Response?15 VS, CF = 1 pF, RL = 150 ?
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AD828
THEORY OF OPERATIONThe AD828 is a low cost, dual video operational amplifierdesigned to excel in high performance, high output currentvideo applications.The AD828 consists of a degenerated NPN differential pairdriving matched PNPs in a folded-cascade gain stage (Figure 4).The output buffer stage employs emitter followers in a class ABamplifier that delivers the necessary current to the load whilemaintaining low levels of distortion.The AD828 will drive terminated cables and capacitive loads of10 pF or less. As the closed-loop gain is increased, the AD828will drive heavier cap loads without oscillating.+VSOUTPUT–IN+IN–VSFigure 4.Simplified SchematicINPUT CONSIDERATIONSAn input protection resistor (RIN in TPC 31) is required in circuitswhere the input to the AD828 will be subjected to transient orcontinuous overload voltages exceeding the ±6 V maximum dif-ferential limit. This resistor provides protection for the inputtransistors by limiting their maximum base current.For high performance circuits, the “balancing” resistor should beused to reduce the offset errors caused by bias current flowingthrough the input and feedback resistors. The balancing resistorequals the parallel combination of RIN and RF and thus providesa matched impedance at each input terminal. The offset voltageerror will then be reduced by more than an order of magnitude.APPLYING THE AD828The AD828 is a breakthrough dual amp that delivers precision andspeed at low cost with low power consumption. The AD828 offersexcellent static and dynamic matching characteristics, combinedwith the ability to drive heavy resistive loads.As with all high frequency circuits, care should be taken to main-tain overall device performance as well as their matching. Thefollowing items are presented as general design considerations.Circuit Board LayoutInput and output runs should be laid out so as to physicallyisolate them from remaining runs. In addition, the feedbackresistor of each amplifier should be placed away from the feed-back resistor of the other amplifier, since this greatly reducesinteramp coupling.Choosing Feedback and Gain ResistorsTo prevent the stray capacitance present at each amplifier’ssumming junction from limiting its performance, the feedbackresistors should be ≤ 1 k?. Since the summing junction capaci-tance may cause peaking, a small capacitor (1 pF to 5 pF) maybe paralleled with RF to neutralize this effect. Finally, socketsshould be avoided, because of their tendency to increase interleadcapacitance.Power Supply BypassingProper power supply decoupling is critical to preserve theintegrity of high frequency signals. In carefully laid out designs,decoupling capacitors should be placed in close proximity tothe supply pins, while their lead lengths should be kept to aminimum. These measures greatly reduce undesired inductiveeffects on the amplifier’s response.Though two 0.1 μF capacitors will typically be effective indecoupling the supplies, several capacitors of different valuescan be paralleled to cover a wider frequency range.PARALLEL AMPS PROVIDE 100 mA TO LOADBy taking advantage of the superior matching characteristics of theAD828, enhanced performance can easily be achieved by employ-ing the circuit in Figure 5. Here, two identical cells are paralleledto obtain even higher load driving capability than that of a singleamplifier (100 mA min guaranteed). R1 and R2 are included tolimit current flow between amplifier outputs that would arise inthe presence of any residual mismatch. 1k?+VS1?F0.1?F 1k?28 R15?AD8281/213VINVOUT5 R25?RL 1k?AD8281/27640.1?F1?F 1k?–VSFigure 5.Parallel Amp ConfigurationREV. C
FPGA可编程逻辑器件芯片AD828ARZ-REEL中文规格书 - 图文
