半导体传感器AD7715ARZ-5中文规格书

AD7708/AD7718

1.Write to the ADCCON register to select the channel to becalibrated, its input range, and operation in unipolar orbipolar mode.4.When the data is read, increment the channel address pointerto select the next channel, poll the RDY pin, or RDY bit inthe status register, and again read the data. Continue until allchannels have been read.2.Write to the mode register selecting chop or nonchop modeof operation, select the reference, buffered/unbuffered opera-tion on the AINCOM, and select zero-scale offset calibration.Zero-scale calibration can be either self-calibration, wherethe ADC determines the zero point internal to the ADC, or asystem calibration where the user must supply the zero-scalevoltage to the input for the duration of the calibration.3.The calibration is initiated following the write to the moderegister. The user then needs to determine when the calibra-tion is complete. This can be performed in two ways, bypolling the RDY pin or flag or by monitoring the MD2,MD1, MD0 bits in the mode register. These bits are reset to0, 0, 1 when the calibration is complete. The flowchart usespolling of the mode bits in the mode register to determinewhen the calibration is complete.4.The next step is to perform the full-scale calibration. Full-scalecalibration can be a self-calibration or system calibration.Using system calibration the user must supply the full-scalesignal to the analog inputs for the duration of the calibration.Again the MD2, MD1, MD0 bits in the mode register aremonitored to determine when the calibration is complete.Figure 18 shows a flowchart detailing the necessary program-ming steps required to cycle through and read data results fromall channels in a multiplexed application. This flowchart assumesthat all channels have been previously calibrated. The followingare the general programming steps required when reading allchannels in a multiplexed application.1.The AD7708/AD7718 is put into continuous conversionmode. In this mode the part continually converts on thespecified channel and the RDY line indicates when validdata is available to be read from the data register.2.The ADCCON register is written to select the channelfor conversion, its input range and operation is unipolar/bipolar mode.3.In this flowchart hardware polling of the RDY line is per-formed to determine when it is valid to read data from theconverter. When RDY is low, valid data is available in thedata register. The RDY line is set high on a channel changeand will not go low until a new valid data word is available.Alternatively, the RDY bit in the status register can be polledin software to determine when to read data from the converter.REV. 0–33–

CYCLE THROUGH ANDREAD ALL CHANNELSWRITE TO MODE REGISTER SELECTINGCONTINUOUS CONVERSION MODEWRITE TO ADCCON SELECTING CHANNEL NAND ITS OPERATING RANGEPOLL RDY PINRDYLOW?NOYESWRITE TO COMMUNICATIONS REGISTER SETTING UPNEXT OPERATION TO BE A READ OF DATA REGISTERAND THEN READ DATA RESULTINCREMENT CHANNEL ADDRESS (N = N+1)NOALLCHANNELSREADYESENDFigure 18.Multichannel Read OperationAD7708/AD7718

DIGITAL INTERFACEAs previously outlined, the AD7708/AD7718’s programmablefunctions are controlled using a set of on-chip registers. Data iswritten to these registers via the part’s serial interface and readaccess to the on-chip registers is also provided by this interface.All communications to the part must start with a write operationto the Communications Register. After power-on or RESET,the device expects a write to its Communications Register. Thedata written to this register determines whether the next operationto the part is a read or a write operation and also determines towhich register this read or write operation occurs. Therefore,write access to any of the other registers on the part starts with awrite operation to the Communications Register followed by awrite to the selected register. A read operation from any otherregister on the part (including the output data register) startswith a write operation to the Communications Register followedby a read operation from the selected register.The AD7708/AD7718s serial interface consists of five signals,CS, SCLK, DIN, DOUT and RDY. The DIN line is used fortransferring data into the on-chip registers while the DOUT lineis used for accessing data from the on-chip registers. SCLK isthe serial clock input for the device and all data transfers (eitheron DIN or DOUT) take place with respect to this SCLK signal.The RDY line is used as a status signal to indicate when data isready to be read from the devices’s data register. RDY goes lowwhen a new data word is available in the output register. It isreset high when a read operation from the data register is complete.It also goes high prior to the updating of the output register toindicate when not to read from the device to ensure that a dataread is not attempted while the register is being updated. CS isused to select the device. It can be used to decode these devices insystems where a number of parts are connected to the serial bus.Figures 2 and 3 show timing diagrams for interfacing to theAD7708/AD7718 with CS used to decode the part. Figure 3 isfor a read operation from the AD7708/AD7718 output shiftregister while Figure 2 shows a write operation to the input shiftregister. It is possible to read the same data twice from the out-put register even though the RDY line returns high after the firstread operation. Care must be taken, however, to ensure that theread operations have been completed before the next outputupdate is about to take place.The serial interface can operate in three-wire mode by tying theCS input low. In this case, the SCLK, DIN and DOUT linesare used to communicate with the device and the status of theRDY bit can be obtained by interrogating the STATUS Regis-ter. This scheme is suitable for interfacing to microcontrollers. IfCS is required as a decoding signal, it can be generated from aport bit. For microcontroller interfaces, it is recommended thatthe SCLK idles high between data transfers.The AD7708/AD7718 can also be operated with CS used as aframe synchronization signal. This scheme is suitable for DSPinterfaces. In this case, the first bit (MSB) is effectively clockedout by CS since CS would normally occur after the falling edgeof SCLK in DSPs. The SCLK can continue to run betweendata transfers provided the timing numbers are obeyed.The serial interface can be reset by exercising the RESET inputon the part. It can also be reset by writing a series of 1s on theDIN input. If a Logic 1 is written to the AD7708/AD7718 DINline for at least 32 serial clock cycles, the serial interface is reset.This ensures that in three-wire systems, if the interface is losteither via a software error or by some glitch in the system, it canbe reset back to a known state. This state returns the interfaceto where the ADC is expecting a write operation to its Commu-nications Register. This operation resets the contents of allregisters to their power-on-reset values.Some microprocessor or microcontroller serial interfaces have asingle serial data line. In this case, it is possible to connect theADC’s DOUT and DIN lines together and connect them to thesingle data line of the processor. A 10 k? pull-up resistor shouldbe used on this single data line. In this case, if the interface islost, because the read and write operations share the same line,the procedure to reset it back to a known state is somewhatdifferent than previously described. It requires a read operationof 24 serial clocks followed by a write operation where a Logic1 is written for at least 32 serial clock cycles to ensure that theserial interface is back into a known state.MICROCOMPUTER/MICROPROCESSOR INTERFACINGThe flexible serial interface allows for easy interface to mostmicrocomputers and microprocessors. The flowcharts of Figures16, 17, and 18 outline the sequence that should be followedwhen interfacing a microcontroller or microprocessor to theAD7708/AD7718. Figures 19, 20, and 21 show some typicalinterface circuits.The serial interface on the AD7708/AD7718 is capable of oper-ating from just three wires and is compatible with SPI interfaceprotocols. The three-wire operation makes the part ideal forisolated systems where minimizing the number of interface linesminimizes the number of opto-isolators required in the system.The serial clock input is a Schmitt-triggered input to accommo-date slow edges from optocouplers. The rise and fall times ofother digital inputs to the AD7708/AD7718 should be no slowerthan 1μs.Most of the registers on the AD7708/AD7718 are 8-bit regis-ters, which facilitates easy interfacing to the 8-bit serial ports ofmicrocontrollers. The Data Register on the AD7718 is 24 bitswide, the ADC data register on the AD7708 is 16 bits wide, andthe offset and gain registers are 16-bit registers on the AD7708and 24-bit registers on the AD7718; however, data transfers tothese registers can consist of multiple 8-bit transfers to the serialport of the microcontroller. DSP processors and microproces-sors generally transfer 16 bits of data in a serial data operation.Some of these processors, such as the ADSP-2105, have thefacility to program the amount of cycles in a serial transfer. Thisallows the user to tailor the number of bits in any transfer tomatch the register length of the required register in the AD7708/AD7718.Even though some of the registers on the AD7708/AD7718 areonly eight bits in length, communicating with two of theseregisters in successive write operations can be handled as asingle 16-bit data transfer if required. For example, if the FilterRegister is to be updated, the processor must first write to theCommunications Register (saying that the next operation is awrite to the Filter Register) and then write eight bits to the FilterRegister. If required, this can all be done in a single 16-bittransfer because once the eight serial clocks of the write opera-tion to the Communications Register have been completed,the part immediately sets itself up for a write operation to theFilter Register.–34–REV. 0