Virtex-4DeviceUser I/Os & RocketIO MGT PinsAvailable User I/Os
Virtex-4 FPGA Package
SF363240N/A120240N/A120---------FF668320N/A160448N/A224448N/A224448N/A224---FF672---------------FF676320N/A160448N/A224
FF1148
------640N/A320640N/A320768N/A384
FF1152
---------------FF1513
---------------FF1517
---------------
XC4VLX15RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX25RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX40RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX60RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX80RocketIO TransceiversDifferential I/O Pairs
Virtex-4 FPGA Packaging and Pinout Specification
Device/Package Combinations and Maximum I/Os
Table 1-2: Virtex-4 FPGA Available I/Os and RocketIO MGT Pins per Device/Package Combination (Continued)Virtex-4Device
User I/Os & RocketIO MGT PinsAvailable User I/Os
XC4VLX100
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX160
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VLX200
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VSX25
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VSX35
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VSX55
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VFX12
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VFX20
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VFX40
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VFX60
RocketIO TransceiversDifferential I/O Pairs
Virtex-4 FPGA Package
SF363------------------240N/A120---------FF668---------320N/A160448N/A224---320N/A160---------FF672---------------------32081603521217635212176
-----------FF676
FF1148768N/A384768N/A384---------640N/A320------------FF1152
------------------------4481222457616288
FF1513960N/A480960N/A480960N/A480---------------------FF1517
------------------------------
Virtex-4 FPGA Packaging and Pinout Specification
Chapter 1: Packaging Overview
Table 1-2: Virtex-4 FPGA Available I/Os and RocketIO MGT Pins per Device/Package Combination (Continued)Virtex-4Device
User I/Os & RocketIO MGT PinsAvailable User I/Os
XC4VFX100
RocketIO TransceiversDifferential I/O PairsAvailable User I/Os
XC4VFX140
RocketIO TransceiversDifferential I/O Pairs
Virtex-4 FPGA Package
SF363------FF668------FF672------FF676
FF1148
------FF115257620288---FF1513
------FF15177682038476824384
Virtex-4 FPGA Packaging and Pinout Specification
SF363 Flip-Chip Fine-Pitch BGA Package
Table 2-1: SF363 Package — LX15, LX25, and FX12 Devices (Continued)Bank
11111111
Pin Description
IO_L5P_D23_LC_1 IO_L5N_D22_LC_1 IO_L6P_D21_LC_1 IO_L6N_D20_LC_1 IO_L7P_D19_LC_1 IO_L7N_D18_LC_1 IO_L8P_D17_CC_LC_1 IO_L8N_D16_CC_LC_1
Pin Number
D13 C13 C8 D8 D12 C12 C9 D9
No Connects
in LX15 and FX12 Devices
2222222222222222
IO_L1P_D15_CC_LC_2 IO_L1N_D14_CC_LC_2 IO_L2P_D13_LC_2 IO_L2N_D12_LC_2 IO_L3P_D11_LC_2 IO_L3N_D10_LC_2 IO_L4P_D9_LC_2 IO_L4N_D8_VREF_LC_2
IO_L5P_D7_LC_2 IO_L5N_D6_LC_2 IO_L6P_D5_LC_2 IO_L6N_D4_LC_2 IO_L7P_D3_LC_2 IO_L7N_D2_LC_2 IO_L8P_D1_LC_2 IO_L8N_D0_LC_2
V16 V15 V6 V5 T14 U13 U8 T7 V13 V12 V9 V8 U12 V11 V10 U9
333333333
IO_L1P_GC_CC_LC_3 IO_L1N_GC_CC_LC_3 IO_L2P_GC_VRN_LC_3 IO_L2N_GC_VRP_LC_3 IO_L3P_GC_LC_3 IO_L3N_GC_LC_3 IO_L4P_GC_LC_3 IO_L4N_GC_VREF_LC_3
IO_L5P_GC_LC_3
B12 A11 A10 B9 C11 B11 B10 C10 B13
Virtex-4 FPGA Packaging and Pinout Specification
Chapter 2: Pinout Tables
Table 2-1: SF363 Package — LX15, LX25, and FX12 Devices (Continued)Bank
3333333
Pin Description
IO_L5N_GC_LC_3 IO_L6P_GC_LC_3 IO_L6N_GC_LC_3 IO_L7P_GC_LC_3 IO_L7N_GC_LC_3 IO_L8P_GC_LC_3 IO_L8N_GC_LC_3
Pin Number
A13 A8 B8 B14 A14 A7 B7
No Connects
in LX15 and FX12 Devices
4444
IO_L1P_GC_LC_4 IO_L1N_GC_LC_4 IO_L2P_GC_LC_4 IO_L2N_GC_LC_4
W13 W12 Y5 W5
Virtex-4 FPGA Packaging and Pinout Specification
FPGA可编程逻辑器件芯片XC4VLX40-10FF1148I中文规格书 - 图文
