FPGA可编程逻辑器件芯片XQR4VSX55-10CF1140V中文规格书 - 图文

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Package Overview

Table81 shows the 10 low-cost, space-saving production package styles for the Spartan-3 family. Each package style is available as a standard and an environmentally-friendly lead-free (Pb-free) option. The Pb-free packages include an extra ‘G’ in the package style name. For example, the standard \Pb-free option. The mechanical dimensions of the standard and Pb-free packages are similar, as shown in the mechanical drawings provided in Table83.

Not all Spartan-3 device densities are available in all packages. However, for a specific package there is a common footprint that supports the various devices available in that package. See the footprint diagrams that follow.Table 81:Spartan-3 Family Package Options

PackageVQ100 / VQG100CP132 / CPG132(1)TQ144 / TQG144PQ208 / PQG208FT256 / FTG256FG320 / FGG320FG456 / FGG456FG676 / FGG676FG900 / FGG900FG1156 / FGG1156(1)Notes:

The CP132, CPG132, FG1156, and FGG1156 packages are discontinued.

Leads1001321442082563204566769001156

Type

Very-thin Quad Flat PackChip-Scale PackageThin Quad Flat PackQuad Flat Pack

Fine-pitch, Thin Ball Grid ArrayFine-pitch Ball Grid ArrayFine-pitch Ball Grid ArrayFine-pitch Ball Grid ArrayFine-pitch Ball Grid ArrayFine-pitch Ball Grid Array

Maximum

I/O

638997141173221333489633784

Pitch (mm)0.50.50.50.51.01.01.01.01.01.0

Footprint(mm)16 x 168 x 822 x 2230.6 x 30.617 x 1719 x 1923 x 2327 x 2731 x 3135 x 35

Height (mm)1.201.101.604.101.552.002.602.602.602.60

Selecting the Right Package Option

Spartan-3 FPGAs are available in both quad-flat pack (QFP) and ball grid array (BGA) packaging options. While QFP

packaging offers the lowest absolute cost, the BGA packages are superior in almost every other aspect, as summarized in Table 82. Consequently, Xilinx recommends using BGA packaging whenever possible.Table 82: Comparing Spartan-3 Device Packaging Options

Characteristic

Maximum User I/O

Packing Density (Logic/Area)Signal Integrity

Simultaneous Switching Output (SSO) SupportThermal Dissipation

Minimum Printed Circuit Board (PCB) LayersHand Assembly/Rework

Quad Flat-Pack (QFP)

141GoodFairLimitedFair4Possible

Ball Grid Array (BGA)

633BetterBetterBetterBetter6Very Difficult

DS099 (v3.1) June 27, 2013Product Specification

Spartan-3 FPGA Family: Pinout Descriptions

FG676: 676-lead Fine-pitch Ball Grid Array

The 676-lead fine-pitch ball grid array package, FG676, supports five different Spartan-3 devices, including the

XC3S1000, XC3S1500, XC3S2000, XC3S4000, and XC3S5000. All five have nearly identical footprints but are slightly different, primarily due to unconnected pins on the XC3S1000 and XC3S1500. For example, because the XC3S1000 has fewer I/O pins, this device has 98 unconnected pins on the FG676 package, labeled as “N.C.” In Table 103 and Figure 53, these unconnected pins are indicated with a black diamond symbol (?). The XC3S1500, however, has only two unconnected pins, also labeled “N.C.” in the pinout table but indicated with a black square symbol (?).

All the package pins appear in Table 103 and are sorted by bank number, then by pin name. Pairs of pins that form a differential I/O pair appear together in the table. The table also shows the pin number for each pin and the pin type, as defined earlier.

If there is a difference between the XC3S1000, XC3S1500, XC3S2000, XC3S4000, and XC3S5000 pinouts, then that difference is highlighted in Table 103. If the table entry is shaded grey, then there is an unconnected pin on either the XC3S1000 or XC3S1500 that maps to a user-I/O pin on the XC3S2000, XC3S4000, and XC3S5000. If the table entry is shaded tan, then the unconnected pin on either the XC3S1000 or XC3S1500 maps to a VREF-type pin on the

XC3S2000, XC3S4000, and XC3S5000. If the other VREF pins in the bank all connect to a voltage reference to support a special I/O standard, then also connect the N.C. pin on the XC3S1000 or XC3S1500 to the same VREF voltage. This provides maximum flexibility as you could potentially migrate a design from the XC3S1000 through to the XC3S5000 FPGA without changing the printed circuit board.

DS099 (v3.1) June 27, 2013Product Specification

Spartan-3 FPGA Family: Pinout Descriptions

Table 103:FG676 Package Pinout (Cont’d)

Bank7777777777777777777777777N/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/AN/A

XC3S1000Pin NameIO_L29P_7IO_L31N_7IO_L31P_7IO_L32N_7IO_L32P_7IO_L33N_7IO_L33P_7IO_L34N_7IO_L34P_7IO_L35N_7IO_L35P_7IO_L38N_7IO_L38P_7IO_L39N_7IO_L39P_7