AIP1628 LED Driver IC Product Specification
Specification Revision History ：
Version
2010-01-A 2012-01-B1
Data
2010-01 2012-01
Description
Replace the new template
Increase in the number and history
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1、GENERAL DESCRIPTION
AIP1628是一款以1/5至1/8占空比驱动的LED控制器。 10个段输出线，4个网格输出线，3个段/网格输出线，一个显示存储器，控制电路，键扫描电路都集成到一个芯片中，从而为单片机构建了高度可靠的外围设备。 通过三线串行接口连接到AIP1628。 AIP1628引脚采用28引脚SOP封装，经过优化，可简化PCB布局并节省成本。
Features
??CMOS technology
??Low power consumption
??Multiple display modes (10 segment, 7 grid to 13 segment, 4 grid) ??Key scanning (10 x 2 Matrix) ??8-step dimming circuitry
??Serial interface for clock, data input, data output, strobe pins ??Built-in RC oscillator: （450KHz±5%） ??Available in 28 pins, SOP
2、BLOCK DIAGRAM AND PIN DESCRIPTION
2.1、PIN CONFIGURATIONS
NC 1 DIO 2 CLK 3 STB 4 K1 5 K2 6 VDD 7 SEG1/KS1 SEG2/KS2 SEG3/KS3 SEG4/KS4 SEG5/KS5 SEG6/KS6 SEG7/KS7
8 9 10 11 12 13 14
28 27 26
GND GRID1 GRID2
25 GND 24 23 22
GRID3 GRID4 GND
21 VDD 20 19
SEG14/GRID5 SEG13/GRID6
18 SEG12/GRID7 17 SEG10/KS10 16 SEG9/KS9 15 SEG8/KS8
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2.2、PIN DESCRIPTION Pin No. 1 2 3 4
Pin Name NC
Description
5,6 22,25,28 8～17 18～20 7,21 26,27, 23,24
Data input Pin
This pin inputs serial data at the rising edge of the shift clock
DIO
(starting from the lower bit)
Data Output pin(N-Channel, Open-Drain)
Clock input Pin .This pin reads serial data at the rising edge and
CLK
outputs data at the falling edge. Serial Interface Strobe Pin
STB The data input after the STB has fallen is processed as a command.
When this pin is “HIGH”, CLK is ignored. Key Data input Pins
K1,K2 The data sent to these pins are latched at the end of the display
cycle.(Internal Pull-Low Resistor)
GND Ground Pin
SEG1/KS1～ Segment Output Pins(p-channel, open drain) SEG10/KS10 Also acts as the Key Source SEG12/GRID7 Segment/Grid Output Pins
～
SEG14/GRID6
VDD Power Supply
Grid Output Pins GRID1～
GRID4
3、ELECTRICAL PARAMETER
3.1、 ABSOLUTE MAXIMUM RATINGS (Unless otherwise stated, Ta=25℃, GND=0V)
Characteristic Supply Voltage Input Voltage Drive output current Operating Temperature Storage Temperature Power Dissipation Soldering Temperature
Symbol VDD VI1 IO1 IO2 Topr Tstg PD TL
10s Conditions
Value -0.3 to +7 -0.3 to VDD +0.3
+200 -50 -40～+80 -65～+150 400 250
Unit V V mA ℃ ℃ mW ℃
Grid segment
3.2、RECOMMENDED OPERATING RANGE （Ta= -20℃～+70℃，GND=0V）
Parameter Symbol Min. Typ. Max.
5 5.5 Logic supply voltage VDD 3
High-level input voltage 0.7VDD - VIH VDD Low-level input voltage 0 VIL - 0.3VDD
Unit
V V V
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3.3、ELECTRICAL CHARACTERISTICS
3.3.1 DC CHARACTERISTICS （Ta= -20℃～+70℃，VDD=4.5V～5.5V ,GND=0V）
Parameter Symbol Conditions Min. Typ. Max.
Seg1/KS1～Seg10/KS10,
IOH1 -20 -25 -40
VO=VDD-2V High-level output
current Seg1/KS1～Seg10/KS10,
IOH2 -20 -30 -50
VO=VDD-3V
Low-level output IOL1 80 140 Grid1～Grid4,VO= 0.3V - current
Low-level output VO=0.4V, DIO 4 8 - IDATA current Segment VO=VDD-3V, High-level output ITOLSG - - 5
Seg1/KS1～ Seg10/KS10
current tolerance Input current II VI=VDD/GND - - ±1 High-level input - VIH CLK、DIO、STB 0.7VDD voltage
Low-level input
VIL CLK、DIO、STB - - 0.3VDD
voltage
CLK、DIO、STB - 0.35 Hysteresis Voltage VH -
Dynamic current - - No load , display off IDDdyn 5 dissipation Pull-down - RL K1~K2 - 10 Resistor
3.3.2 SWITCHING CHARACTERISTICS（Ta= -20℃～+70℃，VDD=4.5V～5.5V） Parameter Oscillation frequency Propagation delay Rise Time Fall Time
Maximum clock frequency Input
capacitance
Parameter
Symbol fOSC tPLZ tPZL TTZH1 TTZH2 TTHZ Fmax CI
CLK→DIO CL=15pF, RL=10K?
Seg1/KS1～ Seg10/KS10 CL=300pF
Grid1～Grid4
CL=300pF、Segn、Gridn
Duty=50%
- Conditions
Min - - - - - - 1 -
Typ 450 - - - - - - -
Max - 300 100 2 0.5 120 - 15
Unit KHz ns ns us us us MHz pF
Unit mA mA mA mA % uA V V V mA K?
3.3.3 TIMING CHARACTERISTICS（Ta= -20℃～+70℃，VDD=4.5V～5.5V）
Clock pulse width STB pulse width Set-up time for data Hold time for data
Propagation delay CLK to STB
Symbol PWCLK PWSTB tSETUP tHOLD tCLK STB tWAIT
Conditions
- - - - CLK↑→STB↑ CLK↑→CLK↓
Min 400 1 100 100 1 1
Typ - - - - - -
Max - - - - - -
Unit ns μs ns ns μs μs
Wait time
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4、FUNCTION DESCRIPTION
4.1、Switching characteristic waveform
4.2、DISPLAY MODE AND RAM ADDRESS
Data transmitted from an external device to AIP1628 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM addresses of AIP1628 are given below in 8 bits unit.
xxHL(Lower 4bits) B0
B1
B2 00HL 02HL 04HL 06HL 08HL 0AHL 0CHL
B3
xxHU(Higher 4 bits) B4
B5
B6
B7
00HU 02HU 04HU 06HU 08HU 0AHU 0CHU
xxHL(Lower 4bits) B0
B1
B2
B3
01HL 03HL 05HL 07HL 09HL 0BHL 0DHL
xxHU(Higher 4 bits) B4
B5
B6
B7
DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7
01HU 03HU 05HU 07HU 09HU 0BHU 0DHU
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AIP1628 TM1628中微爱芯LED显示驱动芯片 - 图文
