Revision History
The following table shows the revision history for this document.
Date03/31/0805/08/08
Version1.01.1
Initial Xilinx release.
?Table5-3: Corrected PCI Express Rev 2 parameter values.
?Table7-14: Corrected OOB Nominal Threshold Voltage sub-table forOOBDETECT_THRESHOLD_0/1
?Table7-35 and Table7-37: Corrected RXBUFSTATUS0/1 description.?TableE-1 and TableE-2: Replaced with new tables.????
Added 3G-SDI to Table1-1 and Table5-3.Added (Pad) to all pins in Table1-2.
Revised DIV = 5 and DIV = 4 bulleted conditions under Equation5-1.Revised descriptions of DFEEYEDACMONITOR0/1, DFETAP20/1,
DFETAP2MONITOR0/1, DFETAP30/1, DFETAP3MONITOR0/1, DFETAP40/1, andDFETAP4MONITOR0/1 in Table7-5.
Revision
09/04/081.2
?Revised descriptions of DFE_CAL_TIME, DFE_CFG_0/1, andRX_EN_IDLE_HOLD_DFE_0/1 in Table7-6.
?Added “Channel BER Optimization Approach”, “Use Mode – Fixed Tap Mode”,“Example RX Linear Equalizer and DFE Settings for Chip-to-Chip Applications”, and “Example RX Linear Equalizer and DFE Settings for Backplane Applications” to“Decision Feedback Equalization” in Chapter7.
?Corrected the 101 and 110 encodings for RXSTATUS0/1 in Table7-13.
?Revised the second sentence in the Overview section of “Configurable ChannelBonding (Lane Deskew)” in Chapter7.
?Added note about channel-bonded GTX transceivers being in the same column onpage227 and in Figure7-34.
?Added nominal rating to RREF in footnote 3 of Table10-2 and in the note followingthe table.
?Added Boundary-Scan footnote to page267.
?Revised “Special Conditions: Unused GTX_DUAL Column” in Chapter10.?Added notes about BGA adjacency guidelines to “SelectIO to GTX CrosstalkGuidelines” in Chapter10.
UG198 (v3.0) October 30, 2009RocketIO GTX Transceiver User Guide
Date09/23/08
Version2.0
Revision
?Added TXT device throughout document:
???????????
Inserted TXT device descriptions to paragraphs on page25.Inserted Figure1-2, page27, showing the GTX_DUAL tiles in theXC5VTX150T.
Added TXT analog pins to Table1-2, page29 and Table10-1, page253.Added TXT device to footnote 2 in Table1-5, page40.
Described TXT columns in “Description” in Chapter4 on page62.Added TXT packages to “Package Placement Information” in Chapter4 onpage64.
Inserted Table4-2, page65, showing GTX_DUAL analog pin placement.Inserted TXT GTX placement diagrams (Figure4-8, page72 throughFigure4-19, page83).
Clarified use cases in “Channel Bonding Mode,” page 225.Added TXT device to footnote 3 in Table10-2, page254.
Inserted descriptions of external precision resistor requirements and
resistor calibration circuits for TXT device in “Description” in Chapter10on page251.
Inserted TXT device to TableA-1, page319, TableA-2, page320, TableA-3,page322, TableA-4, page323, TableA-6, page324, TableA-7, page324,TableA-11, page327, TableA-12, page327, and TableA-13, page328.
?
?Moved note about BGA adjacency guidelines above Table10-18, page279.
RocketIO GTX Transceiver User GuideUG198 (v3.0) October 30, 2009
Date11/17/08
Version2.1
Revision
?Added SIM_MODE attribute to Table1-5, page40 and Table3-1, page54.?Added “SIM_MODE,” page 55.
?Corrected MGTAVTTRXC_L/R pins for the TXT 1759 package in Table4-2, page65.?Revised “power control” to “power down” throughout “Generic GTX Power-DownCapabilities,” page 112.
?Removed Relative Power Savings and Recovery Time columns from Table5-12,page112.
?In Table6-4, page130, corrected encoding of TXKERR[3:0] and TXRUNDISP[3:0] and defined them based on the interface width.
?Added notes regarding GTX_DUAL tile connections for FXT and TXT devices aboveFigure10-2, page257.
?Revised Figure10-2, page257.
?Added Figure10-3, page253 and Figure10-4, page253.
?Revised caption in Figure10-4, page258 to include reference to a column.
?Added bulleted notes regarding calibration and powering for FXT and TXT deviceson page259.
?Rewrote “Partially used GTX_DUAL column,” page 268.
?In Table10-6, page268, revised table note 1 and added table note 2.
?Added bullet regarding BGA adjacency guideline for TXT devices on page278.?Removed SATA Generation 3 from Table1-1, page24.
?Added note about legacy support for SmartModels to the first bulleted list and added second bulleted list for SecureIP models in “Overview,” page 53.?Corrected TX differential pin pair states in “TXINHIBIT,” page 153.
?Revised description for TXPOWERDOWN0[1:0] and TXPOWERDOWN1[1:0] inTable6-20, page157.
?In Table7-38, page213, revised descriptions for CLK_CORRECT_USE_0 and
CLK_CORRECT_USE_1; and CLK_COR_ADJ_LEN_0 and CLK_COR_ADJ_LEN_1.?Added paragraph to the end of “Far-End PMA Loopback,” page 251.
?Deleted sentence about clocking restrictions and third paragraph from “MarginalConditions and Limitations,” page 252.
?Added paragraph to the end of “Far-End PCS Loopback,” page 252.
?In Chapter10, added new sections “Resistor Calibration Circuit,” page 255 and“Power Supply Design and Filtering,” page 260.?Revised “Providing Power,” page 265 in Chapter10.
?Added [X:Y] bit designations to attribute names CHAN_BOND_MODE,
CLK25_DIVIDER, OOB_CLK_DIVIDER, PLL_DIVSEL_FB, PLL_DIVSEL_REF,PLL_RXDIVSEL_OUT, PLL_TXDIVSEL_OUT, RX_LOS_INVALID_INCR, andRX_LOS_THRESHOLD in TableD-1, page343.
10/30/093.0
UG198 (v3.0) October 30, 2009RocketIO GTX Transceiver User Guide
RocketIO GTX Transceiver User GuideUG198 (v3.0) October 30, 2009
RocketIO GTX Transceiver User Guide
UG198 (v3.0) October 30, 2009
FPGA可编程逻辑器件芯片XC2S200-5CS144I中文规格书 - 图文
