Product Overview The DW1000 is a fully integrated single chip Ultra Wideband (UWB) low-power low-cost transceiver IC compliant to IEEE802.15.4-2011. It can be used in 2-way ranging or TDOA location systems to locate assets to a precision of 10 cm. It also supports data transfer at rates up to 6.8 Mbps Key Features Key Benefits ? IEEE802.15.4-2011 UWB ? Supports precision location and compliant data transfer concurrently ? Supports 6 RF bands from ? Asset location to a precision of 3.5 GHz to 6.5 GHz 10 cm ? Programmable transmitter ? Extended communications output power range up to 290 m @ 110 kbps ? Fully coherent receiver for 10% PER minimises required maximum range and accuracy infrastructure in RTLS ? Complies with FCC & ETSI ? High multipath fading immunity UWB spectral masks ? Supports high tag densities in ? Supply voltage 2.8 V to 3.6 V RTLS ? Low power consumption ? Small PCB footprint allows cost- ? SLEEP mode current 1 μA effective hardware ? DEEP SLEEP mode current 50 implementations nA ? Long battery life minimises ? Data rates of 110 kbps, 850 system lifetime cost kbps, 6.8 Mbps ? Maximum packet length of Applications 1023 bytes for high data throughput applications ? Precision real time location ? Integrated MAC support systems (RTLS) using two-way features ranging or TDOA schemes in a ? Supports 2-way ranging and variety of markets: - TDOA o Healthcare ? SPI interface to host processor o Consumer ? 6 mm x 6 mm 48-pin QFN o Industrial package with 0.4 mm lead pitch o Other ? Small number of external ? Location aware wireless sensor components networks DW1000 IEEE802.15.4-2011UWBTransceiver ANALOG RECEIVER POWER MANAGEMENT PLL / CLOCK GENERATOR HOST INTERFACE / SPI TO HOST DIGITALTRANSCEIVER ANALOG TRANSMITTER STATE CONTROLLER
DW1000 Datasheet
6 OPERATIONAL STATES AND POWER MANAGEMENT
6.1 Overview
The DW1000 has a number of basic operating states as follows: -
Table 23: Operating States
Description OFF The chip is powered down This is the lowest power state that allows external micro-controller access. In this state the INIT DW1000 host interface clock is running off the 38.4 MHz reference clock. In this mode the SPICLK frequency can be no greater than 3 MHz. In this state the internal clock generator is running and ready for use. The analog receiver and IDLE transmitter are powered down. Full speed SPI accesses may be used in this state. This is the lowest power state apart from the OFF state. In this state SPI communication is not requires an external pin to be driven (can be SPICSn held low or WAKEUP possible. This stateDEEPSLEEP held high) for a minimum of 500 μs to indicate a wake up condition. Once the device has detected the wake up condition, the EXTON pin will be asserted and internal reference oscillator (38.4 MHz) is enabled. In this state the DW1000 will wake up after a programmed sleep count. The low power SLEEP oscillator is running and the internal sleep counter is active. The sleep counter allows for periods from approximately 300 ms to 450 hours before the DW1000 wakes up. RX The DW1000 is actively looking for preamble or receiving a packet In this state the DW1000 periodically enters the RX state, searches for preamble and if no RX PREAMBLE SNIFF preamble is found returns to the IDLE state. If preamble is detected it will stay in the RX state packet. Can be used to lower overall power consumption. and demodulate the TX The DW1000 is actively transmitting a packet
For more information on operating states please refer to the user manual [2].
6.2 Operating States and their effect on power consumption
The DW1000 can be configured to return to any one of the states, IDLE, INIT, SLEEP or DEEPSLEEP between
Name active transmit and receive states. This choice has implications for overall system power consumption and timing, see table below.
Table 24: Operating States and their effect on power consumption
DEVICE STATE
IDLE
Entry to State
Host controller command or previous operation completion Host controller command
Various
INIT Host controller command Host controller command
IDLE
SLEEP Host controller command or previous operation completion Sleep counter timeout
INIT
DEEPSLEEP Host controller command or previous operation completion SPICSn held low Or WAKEUP held high for 500 μs
INIT
OFF External supplies are off External 3.3 V supply on
INIT
Exit from State Next state Current Consumption Configuration Time before RX State Ready
18 mA (No DC/DC)
12 mA (with DC/DC) 4 mA
Maintained Immediate Immediate
Maintained 5 μs 5 μs
1 μA 50 nA 0 Maintained
Maintained
Not maintained
3 ms 3 ms 3 ms
Time before TX State Ready
3 ms 3 ms 3 ms
In the SLEEP, DEEPSLEEP and OFF states, it is necessary to wait for the main on-board crystal oscillator to power up and stabilize before the DW1000 can be used. This introduces a delay of up to 3 ms each time the DW1000 exits SLEEP, DEEPSLEEP and OFF states.
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DW1000 Datasheet
6.3 Transmit and Receive power profiles
1. POWER OFF BETWEEN OPERATIONSConfiguration lost
OFF Idd = 0Device ready foroperation
OFF Idd = 0OSC / PLLSTARTUP
TX / RX OPERATION
OSC / PLLSTARTUP
TX / RX OPERATION
2. DEEP SLEEP BETWEEN OPERATIONSConfiguration retainedOSC / PLLSTARTUP
DEEPSLEEP Idd =100 nA5 ms approx /
1mA
Device ready foroperation
DEEPSLEEP Idd = 100 nATX / RX OPERATION
OSC / PLLSTARTUP TX / RX OPERATION
Device ready foroperation
3. SLEEP BETWEEN OPERATIONSConfiguration retained
SLEEP Idd = 2 μA5 ms approx /
1mA
SLEEP Idd = 2 μAOSC / PLLSTARTUP
TX / RX OPERATION
OSC / PLLSTARTUP
TX / RX OPERATION
4. INIT STATE BETWEEN OPERATIONSConfiguration retained
INIT Idd = 4 mA5 ms approx /
1mA
Device ready foroperationOSC / PLLSTARTUP
TX / RX OPERATION
PLLLOCK
INIT Idd = 4 mA TX / RX OPERATION
5μs approx / 5mA
Figure 30: Sleep options between operations
The tables below show typical configurations of the DW1000 and their associated power profiles.
Table 25: Operational Modes
Mode Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7 Mode 8 Mode 9 Mode 10 Mode 11 Mode 12 Mode 13 Mode 14 Mode 15 Mode 16 Data Rate 110 kbps 6.8 Mbps 110 kbps 6.8 Mbps 6.8 Mbps 6.8 Mbps 110 kbps 110 kbps 110 kbps 6.8 Mbps 110 kbps 6.8 Mbps 6.8 Mbps 6.8 Mbps 110 kbps 110 kbps PRF (MHz) 16 16 16 16 16 16 16 16 64 64 64 64 64 64 64 64 Note: Other modes are possible
Preamble (Symbols) 1024 128 1024 128 1024 128 1024 1024 1024 128 1024 128 1024 128 1024 1024
Data Length (Bytes) 12 12 30 30 1023 127 1023 127 12 12 30 30 1023 127 1023 127 Packet Duration (μs) 2084 152 3487 173 1339 287 78099 10730 2084 152 3487 173 1339 287 78099 10730 Typical Use Case (Refer to DW1000 user manual for further information) RTLS, TDOA Scheme, Long Range, Low Density RTLS, TDOA Scheme, Short Range, High Density RTLS, 2-way ranging scheme, Long Range, Low Density RTLS, 2-way ranging scheme, Short Range, High Density Data transfer, Short Range, Long Payload Data transfer, Short Range, Short Payload Data transfer, Long Range, Long Payload Data transfer, Long Range, Short Payload As Mode 1 using 64 MHz PRF As Mode 2 using 64 MHz PRF As Mode 3 using 64 MHz PRF As Mode 4 using 64 MHz PRF As Mode 5 using 64 MHz PRF As Mode 6 using 64 MHz PRF As Mode 7 using 64 MHz PRF As Mode 8 using 64 MHz PRF ? Decawave Ltd 2015 Subject to change without notice Version 2.10 Page 29
DW1000 Datasheet
Table 26: Typical TX Current Consumption
Mode Name Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7 Mode 8 Mode 9 Mode 10 Mode 11 Mode 12 Mode 13 Mode 14 Mode 15 Mode 16 Avg 48 68 44 60 50 56 35 38 61 79 52 75 53 65 40 43 Avg 86 115 76 115 118 113 57 62 90 112 82 112 114 113 72 76 TX IAVG (mA) Channel 2 Preamble 68 68 68 68 68 68 68 68 83 83 83 83 83 83 83 83 Channel 5 Data 35 50 35 51 51 51 35 35 40 52 40 52 52 52 40 40 Units Data 42 57 42 58 58 58 42 42 46 59 46 59 59 59 46 46 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Avg 56 69 50 67 56 62 42 44 67 85 59 82 60 72 46 50 Preamble 74 74 74 74 74 74 74 74 89 89 89 89 89 89 89 89 Table 27: Typical RX Current Consumption
RX IAVG (mA) Channel 2 Preamble 113 113 113 113 113 113 113 113 113 113 113 113 113 113 113 113 Mode Name Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7 Mode 8 Mode 9 Mode 10 Mode 11 Mode 12 Mode 13 Mode 14 Mode 15 Mode 16 Channel 5 Data Demod 59 118 59 115 118 113 59 59 72 118 72 118 118 118 72 72 Units Data Demod 62 123 62 123 126 126 62 62 75 123 75 123 123 123 75 75 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA Avg 92 122 81 123 126 125 65 70 94 117 85 118 120 119 76 80 Preamble 118 118 118 118 118 118 118 118 118 118 118 118 118 118 118 118 Tamb = 25 ?C, All supplies centered on typical values. All currents referenced to 3.3 V (VDDLDOA, VDDLDOD supplies fed via a 1.6 V 90% efficient DC/DC converter)
From Table 25, Table 26 and Table 27 above it is clear that there is a trade-off between communications range and power consumption. Lower data rates allow longer range communication but consume more power. Higher data rates consume less power but have a reduced communications range.
For a given payload length, the following table shows two configurations of the DW1000. The first achieves minimum power consumption (not including DEEPSLEEP, SLEEP, INIT & IDLE) and the second achieves longest communication range.
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DW1000 Datasheet
Table 28: Lowest power and longest range modes of operation
Mode Lowest Power 2 optionsbased onhardwareconfiguration Longest Range
Data Rate 6.8 Mbps with gating gain 6.8 Mbps with gating gain 110 Kbps Channel PRF (MHz) 16 Preamble (Symbols) 64 Data Length (Bytes) Rx PAC (Symbols) Notes (Refer to DW1000 user manualfor further information) As short as possible 8 Using “tight” gearing tables and a TCXO as the source of the 38.4 MHz clock at each node Using “standard” gearing tables and an XTAL as the source of the 38.4 MHz clock at each node 1 16 128 16 2048 All supported lengths 32 3.5 GHz centre frequency gives best propagation The graph below shows typical range and average transmitter current consumption per frame with the transmitter running at -41.3 dBm/MHz output power and using 0 dBi gain antennas for channel 2.
90 250 TX Iavg (mA) Range 80 200 70 60
50 TX I avg (mA) 40 150 50 100 Range (m) 30 20 10 0 0
Modes Figure 31: Typical Range versus TX average current (channel 2)
Tamb = 25 ?C, All supplies centered on typical values. All currents referenced to 3.3 V (VDDLDOA, VDDLDOD supplies fed via a 1.6 V 90% efficient DC/DC converter)
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DW1000 Datasheet
6.3.1 Typical transmit profile TX power profile for Mode 2 (Returning to DEEPSLEEP state) mA Date rate 6.8Mb/s; Channel 2; Preamble length 128 symbols; 12 byte frame. 70 60 50 40
30
3mA
15mA
65 mA
2010
12 BytePacket 5 0
12mA
48 mA
100nAmax
OSC STARTUP
PLLSTARTUPWR TX DATA
TX SHR
~2ms
7μsTX PHR /PSDU
tDEEPSLEEP
10μs
135μs
16μs
Power measured over this durationFigure 32: Typical TX Power Profile
6.3.2 Typical receive profiles
mA
RX power profile for Mode 2 (Returning to DEEPSLEEP) 130 Data rate 6.8Mb/s; Channel 2; Preamble length 128 symbols; 12 byte frame.
120 110
100
3mA12mA
12 Byte Frame118 mA125 mA
2010
113 mA
12mA 5 0
100nA
7μsmax
timeOSC STARTUPPREAMBLE HUNT
RX SHR
RX PHR/PSDU
HOST RD DATADEEPSLEEPPLL STARTUP~2ms
Variable Time
120μs
16μs
56μs
Power measured over this durationFigure 33: Typical RX Power Profile
130 120 110
mA100RX power profile for Mode 2 with Preamble SNIFF mode
Data rate 6.8Mb/s; Channel 2; Preamble length 128 symbols; 12 byte frame.
3mA12mA2010 113mA
113mA
113mA
113mA
113mA
125 mA
Frame 118 mA
12 Byte
12mA 5 0
100nAMax
time
OSCSTARTUP
PREAMBLE SNIFF
RX SHR
RX PHR/PSDU
HOST RD DATA DEEPSLEEP
PLLSTARTUP~2ms
? Decawave Ltd 2015
Power measured over this
duration
Figure 34: Typical RX Power Profile using SNIFF mode
Subject to change without notice Version 2.10
7μsVariable Time120μs16μs
56μs
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DW1000 Datasheet
7 POWER SUPPLY
7.1 Power Supply Connections
There are a number of different power supply connections to the DW1000.
The chip operates from a nominal 3.3 V supply. Some circuits in the chip are directly connected to the external 3.3 V supply. Other circuits are fed from a number of on-chip low-dropout regulators. The outputs of these LDO regulators are brought out to pins of the chip for decoupling purposes. Refer to Figure 35 for further details.
The majority of the supplies are used in the analog & RF section of the chip where it is important to maintain supply isolation between individual circuits to achieve the required performance.
3.3 V Supply
Internal Switches
Digital IO Ring
On-chip LDO for digital circuits
VDDREGVDDDIG
On-chip LDOs for analog circuits
VDDIFVDDMS
All other 3V3 circuits
“Always On” Config Store
VDDLDOAVDDBATTVDDLDODVDDAONVDDPA2 VDDPA1VDDLNAVDDIOA DW1000 Rx LNA Tx PA
VDDSYN VDDCLK VDDVCO7.2 Use of External DC / DC Converter
The DW1000 supports the use of external switching regulators to reduce overall power consumption from the power source. Using switching regulators can reduce system power consumption. The EXTON pin can be used to further reduce power by disabling the external regulator when the DW1000 is in the SLEEP or DEEPSLEEP states (provided the EXTON turn on time is sufficient).
3.3 V Supply
VDDIO To External Decoupling Capacitors
Figure 35: Power Supply Connections
EXTON
EN VIN
DC / DC
VOUT
“Always On” Config Store
1.8 V
Internal Switches
On-chip LDO for digital circuits
VDDDIG
Digital IO Ring
On-chip LDOs for analog circuits
VDDIFVDDMSVDDVCOAll other 3V3 circuits
VDDSYN VDDCLK
VDDLDOAVDDBATTVDDLDODVDDAONVDDPA2 VDDPA1VDDLNAVDDIOA DW1000 Rx LNA Tx PA
VDDREG VDDIO To External Decoupling Capacitors
Figure 36: Switching Regulator Connection
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Subject to change without notice
Version 2.10
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DW1000 Datasheet
7.3 Powering down the DW1000
The DW1000 has a very low DEEPSLEEP current (typ. 50 nA – see Table 3). The recommended practise is to keep the DW1000 powered up and use DEEPSLEEP mode when the device is inactive.
In situations where the DW1000 must be power-cycled (the 3.3 V supply in Figure 35 / Figure 36 respectively turned off and then back on), it is important to note that when power is removed the supply voltage will decay towards 0 V at a rate determined by the characteristics of the power source and the amount of decoupling capacitance in the system.
In this scenario, power should only be reapplied to the DW1000 when: -
? ?
VDDAON is above 2.3 V or:
VDDAON has fallen below 100 mV
Reapplying power while VDDAON is between 100 mV and 2.3 V can lead to the DW1000 powering up in an unknown state which can only be recovered by fully powering down the device until the voltage on VDDAON falls below 100 mV.
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DW1000 Datasheet
8 APPLICATION INFORMATION
8.1 Application Circuit Diagram
Optional Use of TCXOU3VDD_3V3
IRQ
VCC OUTGNDGND
GND
0.1uFVDDDIG
100K
3V LDO
VDD_TCXOGND
optional external pull-down if SLEEPor DEEPSLEEP modes are usedX2VCC
(paddle) VDDBAT TESTMODE IRQ VDDDIG VSSIO VDDIO SPICLK SPIMISO SPIMOSI GPIO0 GPIO1 38.4 MHz
GND49GND 48 47 46 45 44 43 42 41 40 39 38 37 GND
0.1uFGND X1
OUT
VDDLDOA VDDBAT 38.4 MHz TCXO
2200pF
XTAL1
GND
SPICLK SPIMISO SPIMOSI GPIO0 GPIO1 GPIO3 GPIO4 GPIO5 SYNC RSTn
GPIO6
GND
GND 16k27p1p2GND0.1uFWAKEUPVDDLNA VCOTUNENCFORCEONVDDDREG 2 3 4 5 0.1uF 6 0.1uF 7
8 9 10
0.1uF 11
12
1GND11k(1%) XTAL2 VREF VDDMS VDDIF
XTAL1VDDCLK NC
NC
DW1000
CLKTUNE VDDSYN VDDVCO
EXTONVDDPAVDDPA270R820p0.1uF 14 15 VDDLNA 16 17 18 VDDPA 19 VDDPA 20 21 22 23 24 GND
GND
SPICSn
GPIO3 GPIO4 GPIO5 VSSIO VDDIO GPIO6 SYNC VDDIOA RSTn VDDLDOD VDDAON
GPIO2 35 34 33 32 31 30 29 28 27 26 25
36GPIO210pF10pFoptional externalpull-ups for SPImode configuration
VDDLDOA 0.1uF
GND
10k
VDD_3V3 RF_N GND VDDIOA
10kVDDLDOD VDDAON
RF_PDon’t DoU1
NC This!
0.1uF SPICSn GNDGND
18p13T1Antenna
12pGND
WAKEUP
RF Trace 50R
GNDRF Traces 100R RF Traces 100R
VDDDIG EXTON
U2
VDDLDOD 12p
0.1 uFGND
EnVDD_3V3
Vout
1V8Vin
VDDLDOADC-DC Convertor(optional)
VDD_3V3
VDDPA
VDDPA
VDDLNA VDDBAT
VDDIOA
VDDAON
VDDLDOD
VDDLDOA
10000pF 4.7uF 330pF330pF0.1uF0.1uF10pF0.1uF0.1uF0.1uF0.1uFGND
Decoupling: Place capacitors close to pins
Figure 37: DW1000 Application Circuit
8.2 Recommended Components
Function Antenna SMT UWB Balun 3-8 GHz Capacitors (Non polarized) ? Decawave Ltd 2015 Manufacturer Taiyo Yuden Partron TDK Corporation Murata KEMET Part No AH086M555003 ACS5200HFAUWB HHM1595A1 GRM155 series C0805C476M9PACTU Ref Web Link T1 Version 2.10 Page 35 47 μF Subject to change without notice 0.1uF47uF10pF
DW1000 Datasheet
Function Crystal MHz (38.4 +/-10ppm) DC/DC Resistors TCXO (optional use in Anchor nodes. MHz) 38.4 Manufacturer Abracon Geyer Rakon Part No ABM10-165-38.400MHz- T3 KX-5T (need to request tight tolerance option) HDD10RSX-10 509344 Ref X1 Web Link Note that the crystal loading caps must be selected according to the crystal manufacturer’s recommendation and your PCB design so as to place the nominal crystal oscillation frequency in the centre of the DW1000 crystal trim range. The values given in Figure 37 above are for example purposes only and may not apply to your design. Murata ROHM Abracon Geyer Rakon LXDC2HL_18A MCR01MZPF ASTXR-12-38.400MHz- 514054-T KXO-84 IT2200K 3.3V 38.4MHz U2 X2 8.3 Application Circuit Layout
8.3.1 PCB Stack
The following 4-layer PCB stack up is one suggested stack up which can be used to achieve optimum performance.
MANUFACTURING STACKUP 4-LAYER IMPEDANCE CONTROLLED PCB WITH TH VIAS File Ext Description Board Stackup GTP GTO GTS GTL G1 Top Paste Top Silkscreen Top Solder Top Layer Inner Layer 1 FR4 Core 510 μm 1 x 7628 50% FR4 Pre Preg1 x 106 76% FR4 Pre Preg FR4 Core Copper 38 μm (finished) Copper 18 μm 58 μm Copper 18 μm Copper 38 μm (finished) 207 μm G2 GBL GBS GBO GBP Inner Layer 2 1 x 7628 50% FR4 Pre Preg 207 μm 510 μm Bottom Layer Bottom Solder Bottom Silkscreen Bottom Paste TOTAL THICKNESS Controlled Impedance Traces are as follows: - a) Tolerance on all lines, unless other wise specified +/- 10% 1.600 mm +/- 10% b) 50 ? Single Ended CPW Traces on Top Layer (50 ? with reference to Inner Layer 1, no solder resist) = 0.95 mm (1.00 mm GND gap) c) 100 ? Differential Microstrip Traces on Top Layer (100 ? with reference to Inner Layer 1, no solder resist) = 0.235 mm Track / 0.127 mm Gap
Figure 38: PCB Layer Stack for 4-layer board
8.3.2 RF Traces
As with all high frequency designs, particular care should be taken with the routing and matching of the RF sections of the PCB layout. All RF traces should be kept as short as possible and where possible impedance discontinuities should be avoided. Where possible RF traces should cover component land patterns.
Poor RF matching of signals to/from the antenna will degrade system performance. A 100 ? differential
impedance should be presented to the RF_P and RF_N pins of DW1000 for optimal performance. This can be realised as either 100 ? differential RF traces or as 2 single-ended 50 ? traces depending on the PCB layout. In most cases a single-ended antenna will be used and a wideband balun will be required to convert from 100 ? differential to 50 ? single-ended.
Figure 39 gives an example of a suggested RF section layout. In this example traces to the 12 pF series
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DW1000 Datasheet
capacitors from the RF_P and RF_N pins are realised as 100 ? differential RF traces referenced to inner layer 1. After the 12 pF capacitors the traces are realized as 50 ? micro-strip traces again referenced to inner layer 1. Using this method, thin traces can be used to connect to DW1000 and then wider traces can be used to connect to the antenna.
GND
T1
GND12p
RF_PAntenna
RF trace – 50 Ω single ended referenced to inner
layer 1
RF Trace 50R
RF Traces 100R
RF Traces 100R 12p
Figure 39: DW1000 RF Traces Layout
8.3.3 PLL Loop Filter Layout
8.3.4 Decoupling Layout
The components associated with the loop filters of the on-chip PLLs should be placed as close as possible to the chip connection pins to minimize noise pick-up on these lines.
All decoupling capacitors should be kept as close to their respective pins of the chip as possible to minimize trace inductance and maximize their effectiveness.
8.3.5 Layout Guidance
An application note is available from Decawave together with a set of DXF files to assist customers in reproducing the optimum layout for the DW1000.
PCB land-pattern libraries for the DW1000 are available for the most commonly used CAD packages. Contact Decawave for further information.
? Decawave Ltd 2015 Subject to change without notice Version 2.10
RF_N RF trace - 100 ? differential referenced to inner layer 1. 2 x 50 ? single-ended RF trace can also be used. Need to ensure the traces are referenced to correct ground layer
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DW1000 Datasheet
9 PACKAGING & ORDERING INFORMATION
9.1 Package Dimensions
Parameter Unit weight Min Typ 0.105 Max Units g Figure 40: Device Package mechanical specifications
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DW1000 Datasheet
9.2 Device Package Marking
The diagram below shows the package markings for DW1000.
Figure 41: Device Package Markings Legend: W228E-1N LLLLLL ZZ PH YY WW
7 digit manufacturing code 6 digit lot ID
2 digit lot split number Assembly location 2 digit year number 2 digit week number
9.3 Tray Information
The general orientation of the 48QFN package in the tray is as shown in Figure 42.
Figure 42: Tray Orientation
The white dot marking in the chip’s top left hand corner aligns with the chamfered edge of the tray.
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DW1000 Datasheet
9.4 Tape & Reel Information
9.4.1 Important note
The following diagrams and information relate to reel shipments made from 23rd March 2015 onwards. Information relating to reels shipped prior to that date may be obtained from Decawave.
9.4.2 Tape Orientation and Dimensions
The general orientation of the 48QFN package in the tape is as shown in Figure 43.
User Direction of Feed
Figure 43: Tape & Reel orientation
K0
B
0T
Expanded Section ‘X - X’Dimensions Ao Bo Ko P T W Values 6.3 ± 0.1 6.3 ± 0.1 1.1 ± 0.1 12.00 ± 0.1 0.30 ± 0.05 16.00 + 0.30 – 0.10 Notes All dimensions in mm sprocket hole pitch cumulative tolerance ± 0.20Material: Conductive Polystyrene Camber not to exceed 1.0 mm in 250 mm Figure 44: Tape dimensions
9.4.3 Reel Information: 330 mm Reel Base material: High Impact Polystyrene with Integrated Antistatic Additive Surface resistivity: Antistatic with surface resistivity less than 1 x 10e12 Ohms per square
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DW1000 Datasheet
Tape Width 16
A Diameter 330 / 380 B (min) 1.5 C 13 + 0.5 - 0.2 D (min) 20.2 N Hub 100 / 150 +/-1 mm W1 16.4 + 2.0 – 0.0 W2 (max) 22.4 W3 (min) 15.9 W4 (max) 19.4 Figure 45: 330 mm reel dimensions
All dimensions and tolerances are fully compliant with EIA- 481-C and are specified in millimetres.
9.4.4 Reel Information: 180 mm reel
Base material: Surface resistivity:
High impact polystyrene with integrated antistatic additive.
Antistatic with surface resistivity less than 1 x 10e12 Ohms per square.
Tape Width 16 A Diameter 178 +/- 1.0 C 13.5 +/- 0.5 D (min) 20.2 N Hub 60 + 1.0 – 0.0 W1 17 +/- 0.5 W2 (max) 19.5 Figure 46: 180 mm reel dimensions
All dimensions and tolerances are fully compliant with EIA- 481-C and are specified in millimetres.
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DW1000 Datasheet
9.5 Reflow profile
The DW1000 should be soldered using the reflow profile specified in JEDEC J-STD-020 as adapted for the particular PCB onto which the IC is being soldered.
9.6 Ordering Information
The standard qualification for the DW1000 is industrial temperature range: -40 oC to +85 oC, packaged in a 48- pin QFN package.
Table 29: Device ordering information
Ordering Codes:
High Volume
Ordering code DW1000-I DW1000-ITR7 DW1000-ITR13
Status Active Active Active
Package Type Tray Tape & Reel Tape & Reel
Package Qty
490 1000 4000
Note Available Available Available
Samples
Ordering Code DW1000-I DW1000-ITR7 DW1000-ITR13
Status Active Active Active
Package Type Tray Tape & Reel Tape & Reel
Package Qty 10-490 100 – 1000 100 – 4000
Note Available Available Available
All IC’s are packaged in a 48-pin QFN package which is Pb free, RoHS, Green, NiPd lead finish, MSL level 3 IC Operation Temperature -40 oC to +85 oC.
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DW1000 Datasheet
10 GLOSSARY
Table 30: Glossary of Terms
Abbreviation EIRP Full Title Equivalent Isotropically Radiated Power European Telecommunication Standards Institute Federal Communications Commission Full Function Device General Purpose Input / Output Institute of Electrical and Electronic Engineers Long Inter-Frame Spacing Low Noise Amplifier Line of Sight Open Drain
ETSI FCC FFD GPIO IEEE LIFS LNA LOS Open Drain NLOS PGA PLL PPM RF RFD RTLS SFD SIFS SPI TCXO Non Line of Sight Programmable Gain Amplifier Phase Locked Loop Parts Per Million Radio Frequency Reduced Function Device Real Time Location System Start of Frame Delimiter Short Inter-Frame Spacing Serial Peripheral Interface Temperature Controlled Crystal Oscillator Two Way Ranging TWR TDOA Time Difference of Arrival UWB Ultra Wideband ? Decawave Ltd 2015 Explanation The amount of power that a theoretical isotropic antenna (which evenly distributes power in all directions) would emit to produce the peak power density observed in the of maximum gain of the antenna being used. direction Regulatory body in the EU charged with the management of the radio spectrum and the setting of regulations for devices that use it Regulatory body in the USA charged with the management of the radio spectrum and the setting of regulations for devices that use it. Defined in the context of the IEEE802.15.4-2011 [1] standard. Pin of an IC that can be configured as an input or output under software control and has no specifically identified function. Is the world’s largest technical professional society. It is designed to serve professionals involved in all aspects of the electrical, electronic and computing fields and related areas of science and technology. Defined in the context of the IEEE802.15.4-2011 [1] standard. normally found at the front-end of a radio receiver designed to amplify very low Circuitlevel signals while keeping any added noise to as low a level as possible radio channel configuration in which there is a direct line of sight between Physical the transmitter and the receiver. A technique allowing a signal to be driven by more than one device. Generally, each device is permitted to pull the signal to ground but when not doing so it must allow the signal to float. Devices should not drive the signal high so as to prevent contention with devices attempting to pull it low. Physical radio channel configuration in which there is no direct line of sight between the transmitter and the receiver. Amplifier whose gain can be set / changed via a control mechanism usually by register values. changing Circuit designed to generate a signal at a particular frequency whose phase is related incoming “reference” signal. to an Used to quantify very small relative proportions. Just as 1% is one out of a hundred, is one part in a million. 1 ppm used to refer to signals in the range of 3 kHz to 300 GHz. In the context of Generallya radio receiver, the term is generally used to refer to circuits in a receiver before down-conversion takes place and in a transmitter after up-conversion takes place. Defined in the context of the IEEE802.15.4-2011 [1] standard. System intended to provide information on the location of various items in real-time. Defined in the context of the IEEE802.15.4-2011 [1] standard. Defined in the context of the IEEE802.15.4-2011 [1] standard. An industry standard method for interfacing between IC’s using a synchronous serial first introduced by Motorola. scheme A crystal oscillator whose output frequency is very accurately maintained at its value over its specified temperature range of operation. specified of measuring the physical distance between two radio units by exchanging Methodmessages between the units and noting the times of transmission and reception. Refer to Decawave’s website for further information. Method of deriving information on the location of a transmitter. The time of arrival of a transmission at two physically different locations whose clocks are synchronized is noted and the difference in the arrival times provides information on the location of the transmitter. A number of such TDOA measurements at different locations can be used to uniquely determine the position of the transmitter. Refer to Decawave’s website for further information. A radio scheme employing channel bandwidths of, or in excess of, 500 MHz. Subject to change without notice Version 2.10 Page 43
DW1000 Datasheet
Abbreviation WSN
Full Title Wireless Sensor Network Explanation A network of wireless nodes intended to enable the monitoring and control of the physical environment. 11 REFERENCES
[1] IEEE802.15.4-2011 or “IEEE Std 802.15.4?‐2011” (Revision of IEEE Std 802.15.4-2006). IEEE Standard
for Local and metropolitan area networks – Part 15.4: Low-Rate Wireless Personal Area Networks (LR- WPANs). IEEE Computer Society Sponsored by the LAN/MAN Standards Committee. Available from http://standards.ieee.org/
[2] Decawave DW1000 User Manual [3] [4]
[5] EIA-481-C Standard
12 DOCUMENT HISTORY
Table 31: Document History
Revision 2.00 2.01 2.02 2.03 2.04 2.05 2.06 2.07 2.08 2.09 2.10 13 MAJOR CHANGES
Revision 2.03
Page All All 15 21 35 36 44 th 7 November 2012 st 31 March, 2014 th 8 July 2014 th 30 September 2014 st 31 December 2014 st 31 March 2015 th 30 June 2015 th 30 September 2015 st 31 December 2015 st 31 March 2016 th 30 June 2016 Date Description Initial release for production device. Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Scheduled update Change Description Update of version number to 2.03 Various typographical changes Modification to figure 11 caption Addition of text relating to use of RSTn as indicator to external μcontroller Change to application schematic to modify value of TCXO coupling capacitor Correction of Rakon TCXO part number Addition of v2.03 to revision history table Addition of this table and section heading Modification of heading format on this page only Revision 2.04
Page All All 2 23 33 37 Update of version number to 2.04 Various typographical changes Update of table of contents Modification of SPI timing diagrams figure 25 & 26 to correct timing definitions Addition of section 7.3 re power down Change of page orientation to landscape to expand figure 39 for legibility Subject to change without notice Version 2.10 Page 44
Change Description ? Decawave Ltd 2015
DW1000 Datasheet
Page 43 43 Change Description Corrections to v2.03 change table Addition of v2.04 to revision history table Addition of this table Removal of page breaks in heading numbers 11, 12, 13 and 14 Revision 2.05
Page All 2 4 11 20 21 23 34 38 44 45 Update of version number to 2.05 Update to table of contents Modification of copyright notice to 2015 Modifications to Table 6 re Rx sensitivity conditions and Table 7 re recommended TCXO coupling capacitor value Update to Figure 20 and Table 15 to further clarify power up timings addition of Figure 21 to further clarify power up timings Addition to heading of Table 16 Addition of clarification re power supplies that should be removed to power down the chip Addition of device weight to Figure 40 Addition of v2.05 to revision history table Addition of this table Change Description Revision 2.06
Page All All 1 2 10 37 40 – 41 44 45 Update of version number to 2.06 Various typographical / formatting changes Addition of pin pitch / Update to SLEEP current & DEEPSLEEP current Update to table of contents Addition to table 3 to indicate max digital input voltage Modification to figure 39 to clarify referenced layers for impedance matching purposes Changes to tape and reel drawings NOTE CHANGE IN QFN ORIENTATION vs. FEED DIRECTION Addition of v2.06 to revision history table Addition of this table Change Description Revision 2.07
Page All All 35 – 36 44 45 Update of version number to 2.07 Various typographical / formatting changes Addition of Abracon parts to “Recommended Components” table Addition of v2.07 to revision history table Addition of this table Change Description Revision 2.08
Page All All 10 35 37 44 45 Update of version number to 2.08 Various typographical / formatting changes Update to typ current values for INIT & IDLE states Figure 37: Addition of decoupling caps on VDDLDOA and VDDLDOD Clarification of reference layers in Figure 38 Addition of v2.08 to revision history table Addition of this table
Change Description ? Decawave Ltd 2015 Subject to change without notice Version 2.10 Page 45
DW1000 Datasheet
Revision 2.09
Page All All 20 36 37 44 46 Update of version number to 2.09 Change Description Various typographical / formatting changes Modifications to description of power up sequence in section 5.6 to clarify use and control of RSTn including addition of new section 5.6.3 and new Table 16 Modification to Figure 38 to correct impedance reference layer from 2 to 1 Modification to Figure 37 to include external LDO for TCXO Addition of 2.09 to Table 31 Addition of this Table Revision 2.10
Page All All 7 8 8 39 39 42 42 44 46 Update of version number to 2.10 Various typographical / formatting changes Correction of pinout functionality for GPIO5 & 6 in Figure 2 Correction of pinout functionality for GPIO5 & 6 in Table 1 Addition of explanatory text to GPIO and WAKEUP pins in Table 1 Modifications to Figure 41 to reflect actual device markings Modification to Figure 42 to reflect actual device markings Addition of section 9.5 dealing with reflow soldering profile Change of numbering of previous section 9.5 to 9.6 Addition of 2.10 to Table 31 Addition of this Table
Change Description 14 ABOUT DECAWAVE
Decawave is a pioneering fabless semiconductor company whose flagship product, the DW1000, is a complete, single chip CMOS Ultra-Wideband IC based on the IEEE 802.15.4-2011 [1] UWB standard. This device is the first in a family of parts that will operate at data rates of 110 kbps, 850 kbps, 6.8 Mbps.
The resulting silicon has a wide range of standards-based applications for both Real Time Location Systems (RTLS) and Ultra Low Power Wireless Transceivers in areas as diverse as manufacturing, healthcare, lighting, security, transport, inventory & supply chain management.
Further Information
For further information on this or any other Decawave product contact a sales representative as follows: - Decawave Ltd
Adelaide Chambers Peter Street Dublin 8 Ireland e: w:
? Decawave Ltd 2015 Subject to change without notice Version 2.10 Page 46
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