SEMICONDUCTOR MEMORY
申请(专利)号： JP19840210739
专利号： JPS6190391A 主分类号： G11C11/409
申请权利人： NEC CORP 公开国代码： JP 优先权国家： JP
摘 要：
PURPOSE:To remove the deterioration of a sense margin due to a coupled noise from a word line to a bit line by generating from a dummy cell a noise at a prescribed level on the bit line, which is a counter-part of the bit line of a memory cell, at the time of the memory cell selection.
CONSTITUTION:A balance signal line P0 and dummy word lines DW1 and DW0 are held at an H level, and a dummy capacity CR in dummy cells DC1 and DC0 is pre-charged to a VP level, which is at the same level is bit lines B0 and B1, through an MOSFET-T2. Then the lines DW1 and DW0 are turned to an L level, and the T2 is turned off. Further the capacity CR is separated from the lines B0 and B1, and the signal P0 is turned to the L level, thereby turning off a T0. After the lines B0 and B1 are separated, a line W0 and the line DW0 are turned to the H level, and the binary information is read out from a memory cell MC0 on the line
申请日： 1984-10-08 公开公告日： 1986-05-08
分类号： G11C11/409;
G11C7/00; G11C11/34; G11C11/401; G11C11/41 发明设计人： TAKESHIMA
TOSHIO 申请国代码： JP
优先权： 19841008 JP
21073984
摘 要 附 图：
B0 as a microsignal, thereby generating from the cell DC0 a reference level of a sense amplifier SA on the line B1. After consecutive reading operations are
completed by amplifying the microsignal, the nonselective line DW1 is turned to the H level, and the dummy capacity of the cell DC1 is pre-charged to the same level as the line B0. 主权项：
权 利 要 求 说 明 书
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SEMICONDUCTOR MEMORY
