Non-volatile semiconductor memory device
申请(专利)号： JP20010137696
专利号： JP3577290B2 主分类号： G11C16/02
申请日： 2001-05-08 公开公告日： 2004-10-13
分类号： G11C16/02;
申请权利人： 公开国代码： 优先权国家： 摘 要：
株式会社ルネサス
テクノロジ
JP JP
发明设计人： 申请国代码： 优先权： 摘 要 附 图：
G11C16/06; H01L21/8247; H01L27/115; H01L29/788; H01L29/792 小野田 宏;
味香 夏夫; 寺田 康;
二ッ谷 知士; 中山 武志; 宮脇 好和; 大井 誠; 福本 敦; 小林 真一; 九ノ里 勇一 JP
19920407 JP
1992085281; 19920630 JP 1992172812; 19920706 JP 1992178116; 19920907 JP 1992238546; 19921224 JP 1992344807
PROBLEM TO BE SOLVED: To shorten the time required for batch erasion operation by unnecessitating write-in operation before erasion and to shorten the time required for rewriting operation also in a flash memory including plural stack gate type memory cells.
SOLUTION: At the time of erasion,
electrons are injected simultaneously to a floating gate 1005 from sources 1003 of plural memory cells. Thus, threshold voltage of plural memory cells is raised. At the time of programming, electrons are released to a drain 1002 from a floating gate 1005 of a selected memory cell, thereby drops threshold voltage of the selected memory cell. 主权项：
权 利 要 求 说 明 书
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Non-volatile semiconductor memory device
