基于FPGA和DSP网络单向时延测量系统设计与实现
唐旭;闻秋香;章敬崇
【期刊名称】《微计算机信息》 【年(卷),期】2012(000)003
【摘要】时延是了解网络运行状态，评价网络QoS的重要指标。本文在研究COMPACT网络单向时延测量方法的基础上，提出了一种无需使用GPS就可以实现高精度时钟同步的方法：设计并研制了由FPGA、EPM7128、晶振DM9000、D5509和SD存储卡等组成的测量系统，实现了端到端网络时延测量，结果表明网络时延的大小会受到交换机的处理能力、传输路径的远近以及网络负栽情况的影响。%Latency is an impotrant parameter of knowing run state and estimating QoS of network.Based on researching the COMPACT algorithms of one-way latency of network,a method of actualizing high presicion timepiece synchronization without GPS was proposed.
The
mesurement
system
composing
of
FPGA,EPM7128,DM9000 crystal osciilator,D5509 and SD memory was designed and developed, and the measurement of end-to-end network latency was realized.The results indicated that the value of network latency was influenced by Drocessing capability of switchs,transmission distance,and loading extent of network. 【总页数】4页(62-64,155)
【关键词】单向时延;时钟同步;FPGA;探测包 【作者】唐旭;闻秋香;章敬崇
基于FPGA和DSP网络单向时延测量系统设计与实现
