好文档 - 专业文书写作范文服务资料分享网站

FPGA中CIC抽取滤波器增益校正的实现

天下 分享 时间: 加入收藏 我要投稿 点赞

FPGA中CIC抽取滤波器增益校正的实现

金燕;李松;冯晓东

【期刊名称】《电视技术》 【年(卷),期】2013(037)007

【摘要】In IF digital signal processing, the applications of FPGA are used more widely. DDC FPGA modular is necessary. Since its structure uses only adders and delayers, a CIC filter is achieved suitable for FPGA. CIC filters usually work in the first level with large amount of computation in DDC system. This paper first analyzes the theory, performance, impact parameters and gain generation reason of the CIC filter, for the problem that gain generated when five stages CIC decimation filter works under different decimation rates in practical application, and then gives the method of gain correction. Finally, it is verified in Modelsim Simulation.%在中频数字化信号处理中,FPGA应用越来越广泛,DDC的FPGA模块化非常必要,CIC滤波器由于其结构只用到加法器和延迟器,很适合用FPGA来实现,通常工作在DDC系统中运算量大的第一级.分析了CIC滤波器的抽取原理、性能、影响参数及增益产生原因,针对实际应用中5级CIC滤波器在不同抽取率下对信号进行抽取时所产生的增益问题,给出了校正方法,并在Modelsim仿真中得到了验证.

【总页数】3页(57-59)

【关键词】CIC抽取滤波器;FPGA;增益校正 【作者】金燕;李松;冯晓东

FPGA中CIC抽取滤波器增益校正的实现

FPGA中CIC抽取滤波器增益校正的实现金燕;李松;冯晓东【期刊名称】《电视技术》【年(卷),期】2013(037)007【摘要】InIFdigitalsignalprocessing,theapplicationsofFPGAareusedmorewidely.DDCFPGAmodularis
推荐度:
点击下载文档文档为doc格式
0yjac9zd94862m61dk4v721et5ixw1005l1
领取福利

微信扫码领取福利

微信扫码分享