BES2300-Z Product Specification
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MCU includes a FFT accelerator engine, supports up to 512 point FFT/IFFT.
MCU includes a hardware I2C master engine, which could access sensor automatically with programmed command sequence, when CPU is clock-gating. Used for moving sensor’s data into SRAM with DMA’s help. This engine is called HWI2C here.
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MCU includes 3 32-bit timers and 1 watchdog, which will reboot system if not be fed.
Peripheral interfaces includes USB 2.0 high-speed device, 3 UART, 2 normal I2C master, 2 SPI up to 26MHz, I2S and SPDIF. (Numbers and features of peripheral interfaces are different by product package.) MCU Sub-block and CODECD Sub-block are connected by synchronous AHB BUS. MCU Sub-block and BT Sub-block are connected by asynchronous AHB Bridge.
Cortex-M4F I/D SYSAudio DMA8-CH60Generic DMA8-CH2USB 2.0 HS OTG(internal DMA mode)3I2C slave(BTSub-system)Async H2HHWI2C(Multi-layer AHB)(RoundRobin)7415Async H2HAHB1AHB0FFTBT Sub-systemSDEMMC, ADMA, GDMA, SPINOR,USB_OTG, I2C_SLV, HWI2CAONCMUPSCWDT/TIMERGPIO/PWMIOMUXAPB0CMUWDT/TIMER0/TIMER1/TIMER2I2C0/I2C1SPILCD0/SPILCD1/SPI_ITN/SPI_PHYUART0/UART1/UART2I2SSPDIFCODECUnify Cache8KBSRAM2 128KB/SRAMRET 128KBSRAM1 256KBSPINOR(support to 64MB)SRAM0 256KBROM2 128KBROM1 128KBROM0 128KB(BOOTROM 48KB)
Figure 2-2 BES2300-Z the Interaction between the Sub-systems
2.2 ARM Cortex-M4F Processor Core
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Up to 300MHz clock frequency with 1.27DMIPS/MHz performance Harvard architecture 32-bit data/address
Address below 0x2000_0000 uses code port, address above 0x2000_0000 uses system port integrated DSP and SIMD instructions
32-bit hardware multiply-accumulate enables single-cycle MAC
BES2300-Z Product Specification
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Hardware divide instruction
Single precision floating point instructions
Thumb-2 technology allows 16-bit instructions and 32-bit instructions to work together without any state switching overhead
ARM eco-system, with CMSIS library and third-party libraries JTAG/SWD debug
BES2300-Z Product Specification
2.3 Memory
BES2300-Z integrates internal memory and serial Flash on-chip with various operating frequencies. ? ? ? ?
0xFFFF_FFFFInternal ROM 850KB for critical constants and code Internal SRAM 830KB for critical data and code BT shared SRAM 64KB
On-chip serial Flash 4MB for custom program
SystemPrivate peripheral bus - ExternalPrivate peripheral bus - InternalPeripheral 256MBBTSRAM 256MBCode 512MB0xA000_00000x9000_00000xE010_00000xE004_00000xE000_00000xD000_00000xC000_0000Res0x8000_00000x6000_0000Peripheral 512MB0x4000_0000MCUExternal RAM 256MBSRAM 256MBCode 512MB0x0000_0000Figure 2-3 BES2300-Z System Address Map
0x3000_00000x2000_0000
Table 2-1 System Address Map Table
Slave BT Sub_sys Reserved FFT CODEC Reserved AHB1 Address Range * 0xDFFF_FFFF ~ 0xA000_0000 0x9FFF_FFFF ~ 0x6000_0000 0x404F_FFFF ~ 0x4040_0000 0x403F_FFFF ~ 0x4030_0000 0x402F_FFFF ~ 0x4020_0000 0x401F_FFFF ~ 0x4010_0000 Cacheable** NC*** NC NC NC Size 1GB 1GB 1MB 1MB 1MB 1MB BES2300-Z Product Specification AHB0 (AON/APB0) SRAMRET SRAM2 SRAM1 SRAM0 Spinor 0x400F_FFFF ~ 0x4000_0000 0x200b_FFFF ~ 0x200a_0000 0x002b_FFFF ~ 0x002a_0000 (alias) 0x2009_FFFF ~ 0x2008_0000 0x0029_FFFF ~ 0x0028_0000 (alias) 0x2007_FFFF ~ 0x2004_0000 0x0027_FFFF ~ 0x0024_0000 (alias) 0x2003_FFFF ~ 0x2000_0000 0x0023_FFFF ~ 0x0020_0000 (alias) Spinor:0x3FFF_FFFF ~ 0x3C00_0000(m4data) Spinor:0x3BFF_FFFF ~ 0x3800_0000(m4data) Spinor:0x0FFF_FFFF ~ 0x0C00_0000(m4code) Spinor:0x0BFF_FFFF ~ 0x0800_0000(m4code) CTRL :0x07FF_FFFF ~ 0x07FF_E000 ROM2 ROM1 ROM0 (BOOTROM 48KB) 0x2805_FFFF ~ 0x2804_0000(alias) 0x0005_FFFF ~ 0x0004_0000 0x2803_FFFF ~ 0x2802_0000(alias) 0x0003_FFFF ~ 0x0002_0000 0x2801_FFFF ~ 0x2800_0000(alias) 0x0001_FFFF ~ 0x0000_0000 NC 128KB NC 128KB C NC C NC NC NC Cache configuration 128KB up to 64MB up to 64MB NC 256KB (64*4) NC 256KB(64*4) NC NC NC 1MB 128KB(64KB+ 48KB+16KB) 128KB(64*2) *: Access uses alias address range to select if through M4 I/D or SYS port.
**: Use addr[26] to decide cacheable and un-cacheable attribute. Higher 64MB is cacheable,lower 64MB is un-cacheable, in align 128MB address range
AHB1 ADDRESS MAP TABLE
Table 2-2 AHB1 Address Map Table
Select with address [19:16]
Slave 15 14 13 12~8 7** 6 5 4 3 2 Module Reserved Reserved Reserved USB_OTG Sensor_hub I2C slave Bt_dump SPINOR gDMA aDMA Address (each 64KB) 0x401F_FFFF ~ 0x401F_0000 0x401E_FFFF ~ 0x401E_0000 0x401D_FFFF ~ 0x401D_0000 0x401C_FFFF ~ 0x4018_0000 0x4017_FFFF ~ 0x4017_0000 0x4016_FFFF ~ 0x4016_0000 0x4015_FFFF ~ 0x4015_0000 0x4014_FFFF ~ 0x4014_0000 0x4013_FFFF ~ 0x4013_0000 0x4012_FFFF ~ 0x4012_0000 Note 320KB space for USB_OTG Configuration port Configuration port Configuration port Configuration port BES2300-Z Product Specification 1 0 SDEMMC Reserved 0x4011_FFFF ~ 0x4011_0000 0x4010_FFFF ~ 0x4010_0000
AHB0 (APB0) ADDRESS MAP TABLE
Table 2-3 APB0 Address Map Table
Slave 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Module CMU WDT Timer0 Timer1 Timer2 I2C0 I2C1 SPILCD0 SPILCD1 SPI_ITN SPI_PHY UART 0 UART 1 UART 2 BT_PCM I2S SPDIF0 Addr start 0x4000_0000 0x4000_1000 0x4000_2000 0x4000_3000 0x4000_4000 0x4000_5000 0x4000_6000 0x4000_7000 0x4000_8000 0x4000_9000 0x4000_A000 0x4000_B000 0x4000_C000 0x4000_D000 0x4000_E000 0x4000_F000 0x4001_0000 Addr end 0x4000_0FFF 0x4000_1FFF 0x4000_2FFF 0x4000_3FFF 0x4000_4FFF 0x4000_5FFF 0x4000_6FFF 0x4000_7FFF 0x4000_8FFF 0x4000_9FFF 0x4000_AFFF 0x4000_BFFF 0x4000_CFFF 0x4000_DFFF 0x4000_EFFF 0x4000_FFFF 0x4001_0FFF Vendor BES ARM ARM ARM ARM Synopsys Synopsys ARM ARM ARM ARM ARM ARM ARM BES Synopsys BES Comment USB PHY control
AHB0 (AON) ADDRESS MAP TABLE
Table 2-4 AON Address Map Table
Slave Module Addr start Addr end Vendor Comment 0 CMU 0x4008_0000 0x4008_0FFF BES 1 GPIO 0x4008_1000 0x4008_1FFF Synopsys GPIO[31:0] 2 WDT 0x4008_2000 0x4008_2FFF ARM 3 PWM 0x4008_3000 0x4008_3FFF ARM